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verilog Jobs In noida

Sr Engineer - Design Verification

Neugene International Inc
4-10 years
1000000 - 2000000 INR

• Strong and relevant expertise with ASIC simulation tools and advanced verification methods. • Expert level in verification languages such as UVM and System Verilog. • Relevant experience with writing block-level and SoC test-plans.

Skills :

FPGA Design

Wipro Limited
3-10 years
Not Specified

Very good System Verilog/UVM/OVM knowledge with prior work experience on live projects.

Skills :