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Sr. FPGA Engineer / Tech Lead - FPGA (URGENT )- BANGALORE

Hi Tides Consulting
Bengaluru / Bangalore
8-15 years
1200000 - 1300000 INR

Should have experience in VHDL/ Verilog programming for complex applications.<br> 2. Should have experience on Xilinx/ Microsemi/ Intel FPGA’s for aerospace or medical or<br> automotive domains.

Skills :

STA Manager

Mulya Consulting
Hyderabad / Secunderabad
6-12 years
Not Specified

Proven experience in constraints (Func/Test) handling,

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Physical Design

Intel Technology India Private Limited
Bengaluru / Bangalore
5-10 years
Not Specified

Looking for Physical Design/ Structural Design Engineers with scope of work encompassing synthesis, scan, floor planning, auto place and route, clock tree synthesis, equivalency verification, static timing analysis, reliability and layout closure.

Skills :

Senior Engineer FPGA / FPGA / VHDL / Verilog Programming

Hi Tides Consulting
Bengaluru / Bangalore
7-12 years
Not Specified

Should have experience in VHDL/ Verilog programming for complex applications

Skills :

Senior STA & RTL Design Engineer

Mulya Consulting
Hyderabad / Secunderabad
5-10 years
Not Specified

A minimum with 12-16 years of total experience in RTL development/coding, constraint development, full chip STA experience

Skills :

Senior STA & RTL Design Engineer

Mulya Consulting
Hyderabad / Secunderabad
5-10 years
Not Specified

A Bachelor in Electrical Engineering or related discipline plus 5 years of experience

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VLSI ASIC Design Architect L1

Wipro Limited
Bengaluru / Bangalore Hyderabad / Secunderabad
10-12 years
Not Specified

10+yrs of expereince in ASIC Design. Expertise in understanding, gathering and finalizing the requirements for ASIC/SOC design.

Skills :

VLSI FPGA Lead

Wipro Limited
Bengaluru / Bangalore Hyderabad / Secunderabad
6-10 years
Not Specified

Minimum 7+years of experience in FPGA/RTL Design

Skills :

We Have Excellent Opportunity with ASIC Frontend Designer <br> Strong Exp in understanding, gathering and finalizing the requirements for ASIC/SOC design<br> Hands on experience in Verilog/VHDL/System.<br> Experience:- 7Y to10Y<br> Location:- HYD/Bang/Pune/Cochin.<br>

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Senior Engineer I - Design

Microchip Technology India Private Limited
Hyderabad / Secunderabad
5-8 years
Not Specified

BSEE (MSEE strongly preferred) and minimum of 10 years of industry experience.

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High Speed Simulation Engineer

Hr Remedy India
Pune
3-8 years
400000 - 700000 INR

We have Urgent Opening for High Speed Simulation Engineer position with an MNC in Pune

Skills :

Software Test Engineer

Microchip Technology India Private Limited
Bengaluru / Bangalore Hyderabad / Secunderabad
3-9 years
Not Specified

Hands on experience in testing and debug of silicon (such as FPGA, ASIC, test chips, etc.)

Skills :

Principal Engineer, Characterization

Microchip Technology India Private Limited
Hyderabad / Secunderabad
6-10 years
Not Specified

8-12 years of experience in product characterization or silicon validation with emphasis on digital and mixed-signal

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Senior Engineer II, Characterization

Microchip Technology India Private Limited
Hyderabad / Secunderabad
5-8 years
Not Specified

MSEE with 3-5 years of experience in product characterization or silicon validation with emphasis on digital and mixed-signal

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Physical Design Engineer

New Global Technologies
Chennai Mumbai
0-5 years
Not Specified

As part of the Ampere Computing Physical Design team, you will be working on cutting-edge designs in 7nm and 16nm process nodes. You will be responsible for and own all aspects of physical design and physical verification effort at a block/sub-chip l

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Static Timing analysis-Vlsi Engineer

Wipro Limited
Bengaluru / Bangalore
5-7 years
Not Specified

Job Description : MS in EE, CE, CS or equivalent nExpertise in the area of static timing analysis for complex sub nanometer designs ( 5nm, 8nm nodes ) using EDA tools like PrimeTime and Tempus. n5 to 7 years Experience in large design STA and timing

CAD engineer for Timing analysis and sign off flow

Intel
Bengaluru / Bangalore
8-11 years
Not Specified

Job Description : Job Description In this role candidate will be leading static timing analysis tools/flow and methodology development/deployment, which involves developing methodologies to support new process nodes as well as design features. Role

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Senior Engineer I - Design

Microchip Technology India Private Limited
Hyderabad / Secunderabad
10-13 years
Not Specified

Job Description SUMMARY ·Design and architect Smart Embedded Vision application designs for FPGA ·The position is for the MCHP FPGA division, Hyderabad Job Requirements ESSENTIAL DUTIES & RESPONSIBILITIES §Develop and test FPGA based designs for Sm

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