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Work with key customers and field support teams to resolve difficult problems and to develop requirements for future model building tool needs.

Skills :

ASIC/Layout Design Engr, Staff

Synopsys (India) Private Limited
Bengaluru / Bangalore Hyderabad / Secunderabad, Telangana
15-18 years

You will be part of an exceptional development team in the area of GPIOs , Specialty IOs and General Purpose Analog IPs.

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The candidate will be part of the DesignWare IP Design R&D team at Synopsys. He/She will be expected to specify, design/architect and implement state-of-the-art RTL designs for the DesignWare.

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Candidate will be part of CDC (Clock Domain Crossing) team working for Static Verification tools over SpyGlass and VC Platform.

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SystemC/TLM Engineer

Synopsys (India) Private Limited
Bengaluru / Bangalore
5-8 years

Understand IP modelling requirements and create ESL model specifications along-with effective closure of open technical issues.

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Application Engineer - Transactor Development

Synopsys (India) Private Limited
Bengaluru / Bangalore Noida
3-5 years

The position requires a dynamic candidate with good communication skills and ability to multi task.

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Experience in memory design and verification of SRAM, SRAM compilers, DRAM, Flash or other non-volatile memories would be an asset.

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Applications Engineer, Staff

Synopsys (India) Private Limited
Bengaluru / Bangalore Hyderabad / Secunderabad, Telangana
3-7 years

This position requires a highly motivated and experienced individual to work with Synopsys’ customers on integrating leading edge Interface IP.

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Direct and guide the activities of a team of analog designers developing high-speed SERDES IP. Conduct design reviews and evaluate the final results of simulation and electrical characterization reports

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ASIC Digital Design Engr, Staff

Synopsys (India) Private Limited
Bengaluru / Bangalore Pune
10-12 years

Verification architecture, test plan development and its review. Verification environment development. Verification using internal or 3rd party VIP for the protocol of interest.

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Senior ASIC Design Verification Engineers

Synopsys (India) Private Limited
Bengaluru / Bangalore Hyderabad / Secunderabad, Telangana
4-14 years

Synopsys Inc - Hiring ASIC Design Verification Engineers

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