Develop and execute implementation plans to synthesize, implement Design For Test, and close timing on complex digital integrated circuits at the block, subsystem or chip level, which are coded in VHDL/Verilog.
Overview: The role involves working on global projects for delivery w.r.t. Data communication products including Routers / Switches / Datacenters (HW / Cisco / Juniper / ALU) & protocols MPLS/OSPF/ISIS/QoS/BGP etc.) in IP Core and IPRAN Networks. De