5+ years’ experience in physical implementation. Experience in all phases of the IC design process from RTL->GDS2 Physical implementation of SoC/Full-chip-level and/or high-speed CPU/GPU/DSP cores Experience in high-speed, low-power, mixed-signal So
Hi Greetings from Inspiration manpower!! This mail is regarding an opening with our Top MNC client.. Kindly revert back immediately with an updated resume if it is relevant to you. Job Location - Bangalore & Noida Qualification - A
Floor planning/Power planning and Place and Route at block level and chip level,Clock Tree Synthesis, timing ecos and timing closure related PD activities,Integration of IO/Analog and Digital blocks,STA,TCL,PERLor PHYTON, physical verificationchecks
8-12 yrs of RTL Design and Development using VHDL/Verilog, FPGA Design Experience in development of modules related to RF Front End, DSP algorithms in MATLAB related to MIMO/Beamforming,Experience in LTE or any OFDM based PHY module development.
FPGA Design Engineer:
· Expertise in understanding, gathering and finalizing the requirements for FPGA design.
· Should have worked on architecture into micro-architecture/detailed design
· Competent in basic digital design concepts, interfacing,
Integrated in our Technology Enablement team,Especially in projects the Advanced Circuit Design (ACD) department will be driving. In close collaboration with other disciplines across our worldwide engineering teams you will be developing Analog Mixed
Qualification: GNM or BSC nursing Experience 1 to 5 years Salary will be discussed in the interview only female nurse required Shift: they will have both day and night shift Hostel facility available if needed Interview will be telephonic