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DFT Engineer

Wipro Limited
Bengaluru / Bangalore Hyderabad / Secunderabad
4-12 years
Not Specified

Handle device scan insertion with multiple clock domains. ATPG

Skills :

Excellent Opportunity with DFT Designer/Lead - HYD/BANG/Pune

Stryde Consulting Services
Bengaluru / Bangalore Hyderabad / Secunderabad
4-12 years
Not Specified

We have Excellent Opportunity with DFT Engineer /DFT Lead<br> Exp:- 5.0 Yrs to 12 Yrs. Locations:- HYD/Bang/Pune/Cochin<br> Strong in Design For Testing, Exp in Scan Insertion, Exp in ATPG

Skills :

FPGA Engineer

Microchip Technology India Private Limited
Bengaluru / Bangalore Hyderabad / Secunderabad
10-12 years
Not Specified

Bachelors or Master’s Degree in Electrical/Electronics Engineering with a minimum of 10-12 yrs experience.

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Automation Testing - JAVA SELENIUM JMETER

DSI Services
Bengaluru / Bangalore
2-6 years
Not Specified

The role will focus on developing sophisticated tests to enable Slync.io to perform the most complex application simulation and comprehensive end to end automation in the industry. The applicant must be meticulous and excel in software architecture a

Skills :

VLSI HVL Verification-Vlsi Architect: -Immediate Opening with our Top MNC Client Bangalore Location. <br>

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Motion Graphic Artist

E-Hireo Global Solutions Private Limited
Bengaluru / Bangalore Thiruvananthapuram / Trivandrum
1-9 years
310000 - 1019999 INR

We are hiring for Motion Graphic/2D Animator for top Edu-Tech company

Skills :

Instructional Designing

GP Strategies India Private Limited
Bengaluru / Bangalore Chennai
4-8 years
Not Specified

GP Strategies is currently looking for an Instructional Designer

Skills :

Motion Graphic Designer

E-Hireo Global Solutions Private Limited
Bengaluru / Bangalore Thiruvananthapuram / Trivandrum
1-8 years
Not Specified

Good Opportunity for Motion Graphic Artist for e-Learning App

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Instructional Designer

Invensis Technologies Private Limited
Bengaluru / Bangalore
3-5 years
Not Specified

Instructional Designing for E-Learning Courses

Skills :

We are hiring a Data Engineer for one of our premier client - A Product base company headquartered in Tokyo, Japan. Work Location is M G Road, Bangalore. <br> <br> Skills Required:<br> Apache Kafka,Distributed Stream Architecture,Analytical Systems,Statistics.

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Senior Engineer, Design Verification

Marvell India Private Limited
Bengaluru / Bangalore
7-9 years
Not Specified

Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 7-9 years of experience.

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VLSI Board Design-Vlsi Lead

Wipro Limited
Bengaluru / Bangalore
5-8 years
Not Specified

Job Description : JD Signal Integrity Analysis Engineer %E2%80%93 5+ years experience n nJob Description nRequired skills n tGood understanding of Signal Integrity and Power Integrity concepts n tPreparation of Signal Integrity Simulation plan n tAbi

Analog Power Integrity Engineer

Intel
Bengaluru / Bangalore
14-17 years
Not Specified

Job Description : Job Description In this position, you will be responsible for the power integrity design for Intel next generation server board and system product based on Intel Processor and chipsets. Your responsibilities will include but not li

Job Description : a) Must have Strong analytical and Problem solving skills b) Efficient in using tools like SABER, MathCAD, Hyperlinx (SI/PI), SystemVision (SPICE/Eldo), PSPICE c) Analog/Digital/Freq. I/O, Power Electronics circuit design d) Expert

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Analog and Mixed Signal Verification Engineer

Intel
Bengaluru / Bangalore India
3-8 years
Not Specified

Job Description : Job Description Job Details: JobOpportunity/Description:In this position, you will be responsible for being a member of a team of Analog Mixed Signal verification engineers to verify and deliver world class intellectual property t

Job Description : * Job Responsibilities : Create low level design, flow charts and implement the scheduler algorithms as per design Run system level simulations of the software to evaluate its performance Create a C co

DFT Engineer

L&T Technology Services Limited
Bengaluru / Bangalore
Not Specified

Job Description JD: * Strong knowledge and experience in Scan Insertion, TestKompression, ATPG, Memory BIST and JTAG at IC level for mixed signal designs. * Experience in using Mentor DfT tools, Cadence RC and simulator tools * Define DfT

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Staff Engineer - ASIC Analog Design

Micron Semiconductor Asia Operations Pte. Ltd
Bengaluru / Bangalore India
4-10 years
Not Specified

Req. ID: 212201 Our vision is to transform how the world uses information to enrich life. Join an inclusive team focused on one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solution we create he

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Senior Engineer - ASIC Analog Design

Micron Semiconductor Asia Operations Pte. Ltd
Bengaluru / Bangalore India
4-10 years
Not Specified

Req. ID: 184823 Our vision is to transform how the world uses information to enrich life. Join an inclusive team focused on one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solution we create he

Skills :

Circuit Design Manager/Lead

Intel
Bengaluru / Bangalore
14-17 years
Not Specified

Job Description : Job Description Requirements * Hands on design experience in clocking and high speed serial interface IP design in cutting edge technology nodes. * Must have 14+ years of experience in analog design and at least a few years

ATPG - VLSI Automatic Test Pattern Generation-Vlsi Engineer

Wipro Limited
Bengaluru / Bangalore
1-3 years
Not Specified

Job Description : Key skills required for the job are: * ATPG - VLSI Automatic Test Pattern Generation-L2 (Mandatory) * VLSI Memory BIST and Boundary SCAN-L1 DFT synthesis Good knowledge of Hierarchical scan synthesis with : o Scan segmentat

ATPG - VLSI Automatic Test Pattern Generation-Vlsi Engineer

Wipro Limited
Bengaluru / Bangalore
1-3 years
Not Specified

Job Description : Key skills required for the job are: * ATPG - VLSI Automatic Test Pattern Generation-L2 (Mandatory) * VLSI Memory BIST and Boundary SCAN-L1 DFT synthesis Good knowledge of Hierarchical scan synthesis with : o Scan segmentat

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