The team is actively looking for a Senior Analog Engineer to design/architect high performance data converters and other mixed signal products which use data converters. Responsibility includes performing the high-level architectural.
RTL2GDS flow creation and qualification for Synthesis, Place and Route, Extraction, Timing and Physical Verification. Will be closely collaborating with EDA vendors and PDK to define, implement, customize, and qualify digital design flows.
Integrated in our Technology Enablement team,Especially in projects the Advanced Circuit Design (ACD) department will be driving. In close collaboration with other disciplines across our worldwide engineering teams you will be developing Analog Mixed
Independent Problem Solver in C Language, Embedded C, AUTOSAR – BSW,CAN configuration, CANoe,Davinci or similar configurator tool. Basisc/theoritical knowledge in Diagnostic Services (UDS) - understand various protocol services,Static Code Analysis,Q
Develop and execute implementation plans to synthesize, implement Design For Test, and close timing on complex digital integrated circuits at the block, subsystem or chip level, which are coded in VHDL/Verilog.
Floor planning/Power planning and Place and Route at block level and chip level,Clock Tree Synthesis, timing ecos and timing closure related PD activities,Integration of IO/Analog and Digital blocks,STA,TCL,PERLor PHYTON, physical verificationchecks