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IP Logic Design Engineer

Intel
Bengaluru / Bangalore India
2-5 years

Job Description Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic

Skills :

SoC Design Engineer - Structural Design

Intel
Bengaluru / Bangalore India
10-13 years

Job Description Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic

Skills :

Frontend Flow and Methodology Engineer

Intel
Bengaluru / Bangalore
12-15 years

Job Description : Job Description Oversees definition, design, verification, and documentation for SoC/IP development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Lo

Skills :

Tools Flow Methodology Engineer

Intel
Bengaluru / Bangalore India
8-11 years

Job Description Oversees definition, design, verification, and documentation for SoC development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integra

Skills :

Senior Pre-Si Verification Engineer

Intel
Bengaluru / Bangalore India
8-11 years

Job Description Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic

Skills :

SOC Design Verification Engineer

Intel
India Bengaluru / Bangalore
5-7 years

Job Description Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logi

Skills :

RTL (Register Transfer Level) Design

Acldigital
Bengaluru / Bangalore India
Not Specified

Preferred Education * B.Tech/B.E Area of Expertise * RTL,CDC,Linting Roles & Responsibilities * Synthesis and ASIC design work experience * Expertise in Low power flows for CLP, UPF * Understanding of RTL to GDS flow Contact P

Emulation Engineer

Intel
Bengaluru / Bangalore India
5-8 years

Job Description Creates emulation/Field Programmable Gate Array (FPGA) models from a Register Transfer Level (RTL) design using emulation/FPGA synthesis, partitioning and routing tools. Defines and documents RTL changes required for emulation/FPGA.

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FPGA IP Design Engineer

Intel
India Bengaluru / Bangalore
8-11 years

Job Description This position is for a leadership role in an exciting new group in Intel India. You will be involved in development of leading edge Intellectual Property cores that will power next generation systems for our customers around the world

Skills :

SoC Design Engineer - RTL

Intel
India Bengaluru / Bangalore
8-11 years

Job Description As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry business and major p

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FPGA IP Design Engineer

Intel
India Bengaluru / Bangalore
8-11 years

Job Description Performs logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs. Participates in the development of Architecture and Microarch

Skills :

SoC Design Engineer - RTL

Intel
India Bengaluru / Bangalore
8-11 years

Job Description As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry business and major p

Skills :

FPGA IP Design Engineer

Intel
India Bengaluru / Bangalore
8-11 years

Job Description This position is for a leadership role in an exciting new group in Intel India You will be involved in development of leading edge Intellectual Property cores that will power next generation systems for our customers around the world

Skills :

SoC Design Engineer

Intel
Bengaluru / Bangalore India
Not Specified

Job Description Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic

Skills :

SoC Design Engineer

Intel
India Bengaluru / Bangalore
4-7 years

Job Description Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic

Skills :

Lead Pre-Si Verification Engineer

Intel
Bengaluru / Bangalore India
8-11 years

Job Description Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic

Skills :

RTL Design Manager

Intel
Bengaluru / Bangalore India
10-13 years

Job Description : Job Description Are you passionate about disrupting the industry with your innovation Working with a diverse groupInfluencing the outcomeThe Graphics & Throughput Computing Hardware Engineering (GTCHE) Team has an opportunity.

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IP Logic Design Engineer

Intel
India Bengaluru / Bangalore
Not Specified

Job Description Performs logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs. Participates in the development of Architecture and Microarch

Skills :

Custom IP Solutions Engineering (CISE) FPGA IP Design Engineer

Intel
Bengaluru / Bangalore India
Not Specified

Job Description Performs logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs. Participates in the development of Architecture and Microarch

Skills :

SoC Design Engineer

Intel
India Bengaluru / Bangalore
Not Specified

Job Description Oversee definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design and logic design. Define module interfaces. Performs Logic design for integration of functional units a

Skills :

SoC Design Engineer

Intel
India Bengaluru / Bangalore
Not Specified

Job Description Oversee definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design and logic design. Define module interfaces. Performs Logic design for integration of functional units a

Skills :

IP Logic Design Engineer

Intel
Bengaluru / Bangalore
5-8 years

Job Description
Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic

Skills :

Network Software Engineer

Intel
Bengaluru / Bangalore
8-11 years

Job Description
Validation of simics models thoroughly to enable pre-si development and validation activities from SW side. Expert in using simulation models, developing testplans, execute and automate testcases. Expert in networking, system architec

Skills :

Senior Verification Engineer

Intel
Bengaluru / Bangalore
0-5 years

Job Description
Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic

Skills :

IP Logic Design Engineer Clocking and PLL IP

Intel
Bengaluru / Bangalore India
4-7 years

Job Description Perform logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units for PLLs.Participate in the development of Architecture and Microarchitecture specifications for the Logic compone

Skills :

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