Bachelor degree in a known university At least 10 years of proven experience in developing formal block level verification environments from scratch Experience with using Formal in the cluster Experience with latest formal techniques
Position corresponds to Pre-silicon verification of ARM architecture based complex CPU subsystem. Engineer will work in a dynamic and consumer oriented environment where both time to market and quality are extremely important.
Hi Greetings from Inspiration manpower!! This mail is regarding an opening with our Top MNC client.. Kindly revert back immediately with an updated resume if it is relevant to you. Job Location - Bangalore & Noida Qualification - A
• 5-9 years functional verification experience in complex IP/SubSystem/SoCs in RTL and Gate level. • Hands on experience using an industry standard verification methodology (UVM/VMM). • Hands on experience on System Verilog •
• Knowledge of multiple Industry standard protocols –PCIe, NVMe, USB4.0, DDR, AXI, CHI, AHB, MIPI, Displayport, Ethernet • Knowledge of Clocking, Boot/Reset flows. • Experience with System Verilog/UVM SOC development environment is must
Graduate with 2-6 years experience in Men's T-Shirts, Formal Shirts, sweat shirts. Collaborating with buyers, suppliers, distributors, delivery terms to ensure all orders arrive at business place on time.
We are looking for a CAD Engineers who wish to transform their careers into Teamcenter Implementation. Career in PLM can be quite rewarding.Dedication along with positive attitude is a must for this. Progneur will provide on job training.