Job Description Job Description: IPG is charted to provide Mixed Signal IPs like Digital Thermal Sensor, Die-2-Die interface, GPIO, Viewpin, etc for Intel SOC products in the space of Client, Graphics, Data Centre...etc. Analog Design Engineer is res
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Job Description Job Description: IPG is charted to provide Mixed Signal IPs like Digital Thermal Sensor, Die-2-Die interface, GPIO, Viewpin, etc for Intel SOC products in the space of Client, Graphics, Data Centre...etc. Analog Design Engineer is res
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Job Description You will be part of C2DG group within DEG, in the Big Core IP development team driving Intel's latest CPU's in the latest process technology. Your responsibilities will include but not limited to: Layout design of Datapath and Registe
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Job Description : Lead Hardware Design Engineer or Embedded Hardware Design Engineer This is your role. What part will you play Work as an individual contributor on innovative research and/or development projects. Be a 'hands-on Technologist', i.e.
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Job Description Job Description: IPG is charted to provide Mixed Signal IPs like Digital Thermal Sensor, Die-2-Die interface, GPIO, Viewpin, etc for Intel SOC products in the space of Client, Graphics, Data Centre...etc. Analog Design Engineer is res
Skills :
Job Description Job Description: IPG is charted to provide Mixed Signal IPs like Digital Thermal Sensor, Die-2-Die interface, GPIO, Viewpin, etc for Intel SOC products in the space of Client, Graphics, Data Centre...etc.Analog Design Engineer is resp
Skills :
Job Description Performs logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs. Participates in the development of Architecture and Microarch
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Job Description In this position, you will be the lead CFG's RTL synthesis, process-independent timing QoR, and design-for-power measurements. You will be part of Intel's CFG(Configurable Fabrics Group) with in IPG team driving highly configurable ne
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Job Description 6+ years of experience in high speed Analog Circuit design and validation, preferably worked on serial IO links like PCIE, USB etc. Knowledge on IO protocol specs including Electrical pin and IP compliance. Familiar with Cadence simul
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Job Description Join the creative team of engineers building highly configurable fabric/bridge IP for Intel products of the future. We are looking for enthusiastic, motivated and passionate verification engineering stalwart to lead a pack of energeti
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Job Description Join the creative team of engineers building highly configurable fabric/bridge IP for Intel products of the future. We are looking for enthusiastic, motivated and passionate verification engineering stalwart to lead a pack of energeti
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Job Description Intel's Custom Compute Group (XCC) is part of the Accelerated Computing Systems and Graphics Group (AXG), and is chartered to provide custom and differentiated silicon/platform solutions to our customers for emerging use-cases and in
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About Applied Applied Materials is the leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. Our expertise in modifying materials at atomic levels and on an industrial scale enables cust
Job Description The IPG IP Engineering Group is looking for energetic and passionate Front End Design Engineer. You will work on high-speed digital design targeted towards low power optimized IP implementations. Your responsibilities will include but
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Job Description The IPG IP Engineering Group is looking for an energetic and passionate Logic Design Engineer who will work on high-speed digital design targeted towards low power optimized IP implementations. You will be responsible for Overseeing d
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Job Description Physical design engineer with experience in Structural Design. Hands-on experience of block, IP, and full-chip floor-planning, synthesis, APR, static-timing, electrical/reliability analysis, tapeout flows.Leading capability to drive S
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Job Description The Accelerated Computing Systems and Graphics Group (AXG) is a newly formed group to increase focus and accelerate execution in strategic growth areas of high-performance computing and graphics for Intel. Within AXG, the Custom Compu
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Job Description - Interact with design team with the purpose to solve synthesis and UPF related problems and propose solutions.- Collaborate with Design Automation (DA) teams to develop and qualify RTL-to-layout synthesis, place, and route flows.- De
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Job Description Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic
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Job Description Summary Responsible for the user interface design of usable and desirable Desktop, Web and Mobile healthcare applications. Contribute to multiple user experience engagements as well as work on complex projects that require in-depth kn
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Job Description Seize the opportunity to work with the team responsible for RTL logic design and microarchitecture of chipsets for PCs millions of people around the world will use. The Chipsets Logic Team, CLT is part of the Chipsets Silicon Group, C
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Job Description The Accelerated Computing Systems and Graphics Group (AXG) is a newly formed group to increase focus and accelerate execution in strategic growth areas of high-performance computing and graphics for Intel. Within AXG, the Custom Compu
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Job Description If you are passionate about computer graphics, disrupting the industry with your innovation and working with leading graphics engineers on Intel's latest GPU/CPU architecture, then our Accelerated Computing Systems and Graphics (AXG)
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Job Description About the Group:As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry busi
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Job Description Performs logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs. Participates in the development of Architecture and Microarch
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