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Physical Design Director/Lead

Global Technologies
Bengaluru / Bangalore
10-20 years
Not Specified

10-15 years- experience in chip implementation as a top-level lead.<br> Proven track record with multiple successful final production tape-outs at advanced finfet nodes preferably 7nm and below<br> Experience in all phases of the IC design process from RTL->

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Digital SoC Verification

Vitestork Consulting Private Limited
Bengaluru / Bangalore
6-16 years
Not Specified

• Setting up the verification methodology, EDA environment, design flow, for SoCs with embedded analog processor cores & IPs, from RTL to post physical design verification<br> • Delivery of fully verified – including both functionally and test coverage w

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Digital and Verification Manager

Vitestork Consulting Private Limited
Bengaluru / Bangalore
12-20 years
Not Specified

Incumbent will be responsible for Functioning with clients, technical teams for securing & executing concurrent objectives.

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Backend Engineer

Klaus It Solutions Private Limited
Bengaluru / Bangalore
5-10 years
Not Specified

Backend Design Engineers<br> Exp in High Speed, ASIC , CPU , GPU.<br> Mentor graphics VS 2.6 and beyond , packaging experience ( 1st Priority)<br> Packaging in Allegro (2nd Preference)<br> Board designers with HDI experience using mentor Graphics.<br>

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Rtl Design Engineer

Sign On Solutions Private Limited
Bengaluru / Bangalore
3-6 years
Not Specified

A minimum of about 3 years’ experience in the area of Serial Protocols IPs or Subsystems. <br> • Design experience with any of high speed interfaces such as PCIe/USB/SATA is must

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Physical Design Engineer

Tech Mahindra Limited
Bengaluru / Bangalore
3-10 years
Not Specified

Expertise in ASIC design implementation flow and hierarchical physical design strategies, methodologies<br> <br>

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Rtl Design Engineer

Angel And Genie
Bengaluru / Bangalore
3-5 years
Not Specified

Responsibilities include RTL development, resolving system-level challenges, architecting, implementing, documenting and validating the memory controller IP cores. <br> Familiar with different aspects of IP development: micro-architecture.

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Static Timing Analysis (STA)

Angel And Genie
Bengaluru / Bangalore
3-5 years
Not Specified

worked on hierarchical and block level STA analysis<br> <br> o good at debugging constraints and writing ECOs for timing fixes<br> <br> o must have worked on 10nm, 7nm, 5nm technology process nodes<br> <br> o should be familiar with DMSA or manual timing fixes

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Urgent requirement for Embedded Software Engineer for Bangalore location

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Develop and execute implementation plans to synthesize, implement Design For Test, and close timing on complex digital integrated circuits at the block, subsystem or chip level, which are coded in VHDL/Verilog. <br>

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Technical Manager- Verification

Mulya Consulting
Bengaluru / Bangalore
12-16 years
Not Specified

Hands on Experience with at-least one industry standard protocols like Ethernet, PCIe, MIPI, USB or similar is required.

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Electromigration/IR drop (EMIR)

Angel And Genie
Bengaluru / Bangalore
3-5 years
Not Specified

worked on lower technologies like 10nm, 7nm, 5nm process<br> <br> o Good knowledge in Resistance check, Static IR, Dynamic IR, power EM, Signal EM.<br> <br> o debugging skills are very important for the issues in EMIR<br> <br> o must have worked on Redhawk tool

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Physical Design Engineer

Vitestork Consulting Private Limited
Bengaluru / Bangalore
8-16 years
Not Specified

Proven experience in top level floorplanning/block partitioning, Power planning, understanding and planning of clock mesh structure/conventional CTS, Block integration (Including analog IP integration) and Physical Verification Signoff.

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Work with multiple project teams internal and outsourced development partners responsible for all stages of quality assurance for complex products and platforms, including testing strategy, analysis, coding, results evaluation, and proposed correct

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Physical design/STA Engineer

Vitestork Consulting Private Limited
Bengaluru / Bangalore
8-16 years
Not Specified

Proven experience in constraints (Func/Test) handling, block and top level static timing analysis, ECO generation at top level, handshaking with blocks for timing/functional ECO implementation, good exposure in Synthesis for block and top level.

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Physical Design Engineer

Vitestork Consulting Private Limited
Ahmedabad Bengaluru / Bangalore
5-10 years
Not Specified

In Depth experience in Physical Design Implementation & Signoff at block level at 16/7nm technology nodes. Good exposure in Floorplanning, CTS, STA, Physical Verification, Basic understanding of timing constraints. Good exposure to ICC2/Innovus/Cal

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Full chip Physical design engineer

Vitestork Consulting Private Limited
Bengaluru / Bangalore
8-14 years
Not Specified

Proven experience in top level floorplanning/block partitioning, Power planning, understanding and planning of clock mesh structure/conventional CTS, Block integration (Including analog IP integration) and Physical Verification Signoff.

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Physical Design

Intel Technology India Private Limited
Bengaluru / Bangalore
5-10 years
Not Specified

Looking for Physical Design/ Structural Design Engineers with scope of work encompassing synthesis, scan, floor planning, auto place and route, clock tree synthesis, equivalency verification, static timing analysis, reliability and layout closure.

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PCB Layout Design Engineer

Company Name Confidential
Bengaluru / Bangalore
4-10 years
Not Specified

Lead Embedded Hardware Engineer you will be responsible for development of our products. These could include IOT devices, Control systems, Motherboards for different SOMs etc.

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VLSI ASIC Design Architect L1

Wipro Limited
Bengaluru / Bangalore Hyderabad / Secunderabad
10-12 years
Not Specified

10+yrs of expereince in ASIC Design. Expertise in understanding, gathering and finalizing the requirements for ASIC/SOC design.

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Senior Technical Lead - PCB Design And Embedded Systems

Radial HR Solutions
Bengaluru / Bangalore
10-16 years
1400000 - 2000000 INR

Looking for the position of Senior Technical Lead - PCB Design And Embedded Systems: Require Candidates with 10+yrs of experience in PCB Design And Embedded Systems

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DFT Lead

Vitestork Consulting Private Limited
Ahmedabad Bengaluru / Bangalore
8-15 years
Not Specified

Hands on experience in various DFT aspects like Scan insertion, MBIST and JTAG, ATPG, Pattern validation at block level as well as Fullchip level

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MODEL BASED DESIGNER ( BANGALORE) -VERY URGENT

Hi Tides Consulting
Bengaluru / Bangalore
3-7 years
700000 - 900000 INR

• Experience in Model Based Design using Simulink/State flow tool.<br> • Experienced in scaling of Simulink/Target link models.<br> • Exposure to Model In Loop (MIL), Software In Loop (SIL), Processor In Loop (PIL), Hardware In Loop (HIL).<br> • Proficient in Sc

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Full Chip Physical design Engineer/ STA

Vitestork Consulting Private Limited
Bengaluru / Bangalore
8-16 years
Not Specified

Proven experience in constraints (Func/Test) handling, block and top level static timing analysis.

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