Strong Experience in Physical Design & Physical Verification.<br> Working experience with tools like ICC2/ Innovus, Primetime/Tempus etc used in the RTL2GDSII implementation.<br> Proficiency using Perl,Tcl,Pytho<br> Exp:- 4Yrs to 12 Yrs, Location:- HYD/Bang/Pune
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What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks
Skills :
What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks
Skills :
Should be strong in technical concepts, fundamentals, and good team player. The role involves daily technical interaction with local, US counter parts. He/She will be part of SNPS DDR, HBM IP implementation team and responsible for the implementation
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re pow
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re pow
Job Description : Job Role: * Working on 7nm and 5nm designs with various customers for deployment of Aprisa place and route tools. * Expertise in solving custorner's problems for critical designs to achieve desired performance, area and powe
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NXP Semiconductors N.V. (NASDAQ: NXPI) enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better, and safer. As the world leader in secure connectivity solutions for embedded applications, N
Job Description : · Responsibility Synthesis and Timing closure on 7nm/5nm/Future sub-micron technologies at Hard Macro/Subsystem/SoC level. · Job Detail -Work on 7nm/5nm/Future sub-micron Technologies -Co-work with RTL and DFT engineers, prepare SoC
Job Description : At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We offer amazing opportunities to grow, no matter where you are in your career. This opportunity is for a Product Enginee
Job Description : Job Role: * Working on 7nm and 5nm designs with various customers for deployment of Aprisa place and route tools. * Expertise in solving custorner's problems for critical designs to achieve desired performance, area and powe
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We are now looking for a Layout Design Engineer! What you'll be doing: * Layout design involving memory arrays like multi-port register files, RAMs, and/or caches in advanced technologies. * Develop layouts for full custom memory desi
We are now looking for a Senior Circuit Design Engineer! What you'll be doing: * Full custom circuit design involving memory arrays like multi-port register files, SRAMs, and/or caches, for performance critical IPs like CPUs/GPUs. * D
Job Description : Job Role: * Working on 7nm and 5nm designs with various customers for deployment of Aprisa place and route tools. * Expertise in solving custorner's problems for critical designs to achieve desired performance, area and power
Skills :
Job Description : 7+ years working experience in memory Design, characterization and FE Model generation (timing, power). Good experience in Circuit design and able to come up with innovative circuit solution to achieve the best in class PPA Experien