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Full chip Physical design engineer

Vitestork Consulting Private Limited
Bengaluru / Bangalore
8-14 years
Not Specified

Proven experience in top level floorplanning/block partitioning, Power planning, understanding and planning of clock mesh structure/conventional CTS, Block integration (Including analog IP integration) and Physical Verification Signoff.

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Physical Design Engineer

Vitestork Consulting Private Limited
Bengaluru / Bangalore
8-16 years
Not Specified

Proven experience in top level floorplanning/block partitioning, Power planning, understanding and planning of clock mesh structure/conventional CTS, Block integration (Including analog IP integration) and Physical Verification Signoff.

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Excellent Job Opportunity with Physical Design Engineer And Physical Verification.

Stryde Consulting Services
Bengaluru / Bangalore Hyderabad / Secunderabad
4-12 years
Not Specified

Strong Experience in Physical Design & Physical Verification.<br> Working experience with tools like ICC2/ Innovus, Primetime/Tempus etc used in the RTL2GDSII implementation.<br> Proficiency using Perl,Tcl,Pytho<br> Exp:- 4Yrs to 12 Yrs, Location:- HYD/Bang/Pune

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Principal DFT Engineer

Mulya Consulting
Bengaluru / Bangalore Hyderabad / Secunderabad
10-15 years
Not Specified

Looking for Principal DFT Engineer

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Job Description Job Responsibilities: The employee is responsible for complete physical design of multiple large & complex blocks & sub-system implementation 28nm/16nm and below technology nodes. The employee is expected to take ownership of Full Ch

Job Description Job Responsibilities: The employee is responsible for complete physical design of multiple large & complex blocks & sub-system implementation 28nm/16nm and below technology nodes. The employee is expected to take ownership of Full Ch

Principal Engineer I - ASIC DFT

Micron
Bengaluru / Bangalore
Not Specified
Not Specified

Job Description : As an experienced DFT engineer at Micron Technology, Inc., you will be involved with DFT implementation of SoCs. Successful Candidate will be responsible for architecture/implementation of DFT for zero DPPM GHz SoCs in sub-16nm tec

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Principal Engineer I - ASIC DFT

Micron Semiconductor Asia Operations Pte. Ltd
Bengaluru / Bangalore India
Not Specified
Not Specified

Req. ID: 219005 As an experienced DFT engineer at Micron Technology, Inc., you will be involved with DFT implementation of SoCs. Successful Candidate will be responsible for architecture/implementation of DFT for zero DPPM GHz SoCs in sub-16nm techno

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Principal Engineer - Physical Design

Microchip Technology India Private Limited
Bengaluru / Bangalore
Not Specified
Not Specified

Job Description The employee is responsible for complete physical design of multiple large & complex blocks & sub-system implementation 28nm/16nm and below technology nodes. The employee is expected to take ownership of Full Chip/multiple complex de

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Sr. Manager Physical Design (80808)

AMD
Bengaluru / Bangalore
Not Specified
Not Specified

What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks

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Job Description The Mixed Signal Development Group is responsible for delivering analog and mixed-signal IP to divisions within Microsemi. We work with leading edge CMOS processes to produce analog integrated circuits for wireline and RF application

NXP Semiconductors N.V. (NASDAQ: NXPI) enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better, and safer. As the world leader in secure connectivity solutions for embedded applications, N

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