Hands on experience with DDR, CDC, DFT, MBIST, STA, LP checks, LEC. etc Front-End activities
Knowledge of planning and implementing DFT features
Experience with industry standard ASIC implementation flows & tools
Works with external EDA vendors and internal Flow team for Enhancements of Flow.
Experience with etc other Interface protocols timing is plus
-Full flow experience in any of the DFT areas
-Scan and ATPG
-Memory BIST, Logic BIST
-Scripting languages: Perl or TCL
-Production ATE support
-Diagnosis and failure analysis for low yield
-Low power, multi-power domain and mixed-signal design.
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