Principal Design Engineer

Principal Design Engineer

Cadence Design Systems (India) Pvt Ltd
5-15 years
Not Specified

Job Description

Job Description :
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
.Develop and lead development of major ASIC blocks and subsystems (in some cases involving FPGAs), from concept to productization including:
oBalancing performance, area, power, and complexity
oInterfacing to third-party IP
oWorking with physical design team on floor-planning and other physical issues
oDetermining and executing development, integration, bring-up and test plans.
oWriting detailed complete internal specifications
oCompleting implementation in RTL and evaluating synthesis results for performance and cost
oEnsuring robust and complete timing constraints and evaluating STA results.
oWorking closely with verification teams during development
oCollaborating with firmware teams during specification and integration
oWorking with system and design validation testing teams during bring-up and DVT phases.
oGuiding diagnostic and test teams in recommendations to achieve appropriate fault isolation, and function and robustness tests
.Work in small dynamically evolving teams for subprojects involving internal and external resources.
.Mentor junior team members
Develop a deep understanding of the emulation system to contribute to design improvements, support product development teams, and provide ongoing debug and analysis support of the ASIC design
.5-15 years of relevant experience. Degree in Electrical or Computer Engineering, graduate level or compensating experience.
.Proven success in development of complex ASIC, FPGAs and products.
.Demonstrated capability to design major blocks involving ASIC, IPs, logic, and FPGAs.
.Excellent logic developer in Verilog / SystemVerilog.
.Aware of ASIC design flow. Experience with frontend design tools (Xcelium/Incisive, LINT tools, Genus/Design-Compiler, STA with Tempus/PrimeTime, power analysis) expert in at least one of these areas. Exposure to backend tools a plus.
.Relevant experience in some major IPs and protocols, such as SERDES, PCIe and DDR4, and ASIC IP integration in general. Expert in at least one such area.
.Understands DFT, BIST, other DFx methologies.
.Great scripting skills (e.g. Python, Bash, etc.)
.Familiarity with verification methodologies and emulation or prototyping experience helpful.
.Excellent problem-solving and debug skills. Comfortable researching IP, firmware, compiler and systems domains as needed.
.Ability to work cross-functionally. Ability to quickly multi-task among many small projects.
.Does not wish to be confined to a small focused role. Driven to understand the big picture. Can easily switch gears and take on new and diverse tasks.
.Energetic. Self-driven. Good communication, organization, analytical, presentation and people skills.We're doing work that matters. Help us solve what others can't.

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Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. 
Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

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