Physical Design Engineers

Job Description

• Create clock constraints & perform block level clock tree synthesis
• Ownership of block level timing closure activities
• Floor planning, place and route, physical verification
• Complete place & route of the blocks
• Physical verification of the blocks

Progneur is a Global IT company providing services in the area of Industry 4.0 and Semiconductor Design.  We are registered in the US, Europe (Germany, Sweden, UK, Netherlands) and in India (3 locations). Besides the offshore engagements, we provide international opportunity by sponsoring work permits for the Candidate’s. Progneur provides solutions for both  Software and Hardware design. We provide embedded software development and embedded software/firmware engineering design: utilizing the latest embedded technology to develop quality electronic products. In IC Design, we have covered different aspects such as Verification on latest methodologies like UVM/OVM, Power Aware Verification, Physical implementation in submicron technologies, Mask Layout and High Speed (Serdes) Analog Design  

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Functions : IT

Industries : ITES/BPO, IT/Computers - Hardware & Networking, IT/Computers - Software, Other

Skills/Roles I hire for: Sql Dba, Sap Abap, SSE, Java, Sap Basis, .NET, Sap Security, Aix Admin, Oracle Soa

level Hiring For: Junior Level, Mid Level

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