Physical Design Engineer

Physical Design Engineer

Intel
Not Specified
Not Specified

Job Description


Job Description :
Job Description
Creates bottoms-up elements of chip design including but not limited to FET, cell, and block level custom layouts, FUBlevel floor plans, abstract view generation, RC extraction and schematic to layout verification and debug using phases of physical design development including parasitic extraction, static timing, wire load models, clock generation, customer polygon editing, autoplace and route algorithms, floor planning, fullchip assembly, packaging, and verification. Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention. Schedules, staffs, executes and verifies complex chips development and execution of project methodologies and/or flow developments. Requires expansive knowledge and practical application of methodologies and physical design.
Qualifications
Experience of 5+ Yrs Handles block layout independently ensuring quality schedule of deliverables No supervision by lead Works with lead on full chip layout floor plan power grid templates etc Good understanding of RV ESD Routing Knows all flows and tools like GenesysVirtuoso HerculesICV Redhawk Extraction tools Can guide others in the team on tools flows Good knowledge of Rule Decks Shows interest and implements automation ideas Works with DE to identify tasks does planning and scheduling of the deliverables Understanding of complex circuits likes ADC vregs DACs current mirrors PLLs Chargepumps amplifiers etc Educational Qualification BE or EquivalentInside this Business Group
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.
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