Perform logic design, Register Transfer Level (RTL) coding, simulation and synthesis. Participates in the development of Architecture and Microarchitecture specifications for the Logic components. Provides IP integration support to SoC customers and represents RTL team.
• The applicant should have a BS degree or higher in EE, CE or CS, with 8+ years of experience in:
• RTL design and verification with Verilog and/or VHDL is required.
• Knowledgeable in techniques for low latency, multi-clock and multi-power domain designs.
• Has led high speed design implementations.
• Prior experience with Complex as well as high performance IP designs
• Exposure to interfacing with very high-speed serial interfaces preferred.
• Experience of higher performance networking designs or high-performance fabrics is preferable.
• Knowledge of HVM, DFX, etc.Additionally:
• Strong skills in communication, initiative, promote innovation and teamwork.
• Highly motivated to learn and adapt to fast-changing technologies and environments.
• Demonstrates fundamental values such as accountability, integrity and a winning mindset.