• 5+ years related proven silicon design or verification work experience
• Hands on project experience with leading edge verification methodologies like OVM/UVM
• Domain experience of DDR3/DDR4/LPDDR3/LPDDR4 is must
• Hands on project experience in verifying projects using DDR2/DDR3 protocols
• Hands on project experience in coverage/assertion driven verification
• Knowledge of IC chip design, development flow, process, and methodology
• Knowledge of CMOS logic design, circuit design, and circuit analysis
• Proficient in HDL languages SystemVerilog, Verilog and VHDL
• Good knowledge of UNIX shell scripting, Perl and TCL scripting.
Good Opportunity for Physical Verification Engineers with Top MNC's at Bangalore Location.
Day-to-day operational and technical support for the organization’s network (L3), including project work.
Simple body text this will replace with orginal content