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Verification Engineer

Keywords / Skills : IP , SoC , ASIC, System Verilog, OVM, UVM, Methodologies, C

4 - 12 years
Posted: 2018-04-12

Industry
IT/ Computers - Hardware
Function
IT
Role
Hardware Design Engineer
Posted On
12th Apr 2018
Job Description
Primary Skills :-

• Candidate should having 4-12 years of verification for IP or SoC for ASIC Implementation with multiple clock domains, power domains and have good knowledge in SV and methodologies.

• Skills Required : System Verilog & OVM/UVM Methodologies, C Based Verification, Low Power Verification, Gate Simulations, Coverage based Constrained Random Verification, Assertions

• Own and execute verification tasks at SoC or sub-system or IP level..

Secondary Skills :-

• SV / UVM.



About Company

Libsys Inc. is a one-stop-solution provider for all your Corporate Requirements. We nurture you with assistance to help you elevate from Average to Ace!
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END if(1 == 1 && 1 == 1){ print <<"END"; END } print <<"END";