Job Description:What You'll Do
We are looking for an expert and talented Senior Technical Leader. You will have an ASIC design background with hands-on experience in design, verification, physical design, system testing, with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products.Responsibilities:
Who You Are
- Architectural work: in-depth understanding of the architecture, and identification of problems and solutions.
- All aspects of implementation: specification, design, verification, timing-closure, power-optimization, and flow automation.
- Physical design work: timing path analysis, optimization of the logic for low power and area; highlighting issues and standard methodologies for power and area optimization.
- Document and improve standard methodologies to make product successful.
- Lead other specialists in project achievements: schedule, power, area.
- Worked in architecture and definition of high-scale, high-performance ASICs.
- Validated experience in implementation: specification, design, verification, formal verification, system testing.
- Validated experience in physical design aspects: timing analysis and closure, power/area optimizations, macro /placement analysis.
- Validated experience in high bandwidth memory subsystems and timing closure.
- Validated experience in flow automation (scripting, Makefiles, etc), and establishing guidelines for the team.
- Good interpersonal skills, and validated leadership to accurately describe issues/improvements and lead team for on-time completion.
- 10+ years of hands on experience in large-scale, high-performance ASIC.
- BS/MS in EE/CS.
Who You'll Work With
- Understanding of networking and networking processors
- End-to-end design experience from Verilog to gates, block planning, area/timing closure is helpful.
- RTL development and verification (VCS, System Verilog, UVM/OVM, Formal verification)
- Experienced in system debug and SW/HW bringup, system validation of silicon towards FCS.
- Gate-level understanding of RTL and Synthesis
- Programming/scripting skills (C, C++, Perl)
- Hardware Emulation Platforms and tools (such as EVE, Veloce)
- 10+ years of substantial experience
- Good written/verbal interpersonal skills and leadership skills.
Come join us and take part in crafting Ciscos groundbreaking Service Provider and Enterprise solutions by crafting some of the most complex chips being developed in the industry with the opportunity to get full exposure to all aspects of the systems and applications we build (Silicon, Hardware, Software, telemetry, security, etc). Our group offers a rare combination of a startup culture with the benefits of working for the top tier networking company in the world!Why Cisco
We connect everything: people, processes, data, and things. We innovate everywhere, taking ambitious risks to craft the technologies that give us digital cities, connected cars, and handheld hospitals. And we do it in style with rare personalities who aren't afraid to change the way the world works, lives, plays and learns.
We are leaders with vision, tech geeks, pop culture aficionados, and we even have a few purple haired rock stars. We celebrate the creativity and diversity that fuels our innovation. We are dreamers and we are doers.
#We Are Cisco.