Send me more jobs like this

Keywords / Skills : RTL and ASIC

3 - 5 years
Posted: 2019-06-04

Job Description
The Engineer will work with a small team to develop FPGA-based prototypes for next-generation system interconnect and networking devices. The role will include development of new Verilog IP,

integration of existing IP, simulation, synthesis and verification of the design. Experience with Xilinx Vivado tools is strongly preferred.
Key Skill(s)

About Company

Shakapuramu Technologies has been in the service of fulfilling all
intangible needs of composing and staffing solutions to companies at
different levels.
Similar Jobs
View All Similar Jobs
Walkin for you