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  • FPGA Design Engineer ( VHDL / VERILOG / RTL)

    MimoWaves Technologies
    Keyskills: VHDL, Verilog ..., VLSI, ASIC, RTL..., System verilog, HDL
    Summary: Huge hiring for FPGA Design Engineer , RTL Firmware development Engineer for FPGA /SoC target and expertise in VHDL/Verlog programming
    Bengaluru / Bangalore
    1-3 years
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    Posted : 11th Oct 2017

  • Post Silicon Validation Engineer - Firmware

    Astute Solution Private Limited
    Keyskills: , EDA, FPGA, VERILOG..., System verilog, VHDL... VLSI, VLSI... Embedded, ASIC, SOC, RTL
    Summary: The Team and the Role This team focuses on bring up and hardware diagnostics for routers (access/core). You will work with the hardware engineers to understand the design of the next generation ha..
    Bengaluru / Bangalore, Chennai
    2-12 years
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    Posted : 10th Oct 2017

  • FPGA Design Engineer

    Astute Solution Private Limited
    Keyskills: , Verification, EDA, VHDL, FPGA... FPGA, ASCI, SOC..., Verilog, RTL... Design Engineer, FPGA
    Summary: Experience in FPGA applicative implementation such as: regulation algorithm, motor control, signal or image processing, network protocols and packet level analysis
    Bengaluru / Bangalore, Chennai
    3-12 years
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    Posted : 10th Oct 2017

  • Field Application Engineer for Semiconductor

    SaiSun Outsourcing Service Private Limited
    Keyskills: , Verilog, TCL, FPGA... VHDL, TK, PERL
    Summary: Strong Digital Design Skills.Knowledge of Xilinx, Altera or Actel architectures.Experience on handling multimillion gate FPGA Designs.Expertise in VHDL/ Verilog RTL Coding.VHDL/ Verilog based test..
    Hyderabad / Secunderabad
    5-10 years
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    Posted : 23rd Oct 2017

  • Opening for ASIC Verification Engineer for Prodct Based Mnc-bangalore

    Han Digital Solution Private Limited
    Keyskills: System Verilog..., UVM, ASIC
    Summary: Thorough understanding of Front/formal verification methodology. Hands on knowledge on IP & Sub-System
    Bengaluru / Bangalore
    4-6 years
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    Posted : 20th Oct 2017

  • Design Engineer –II

    qusol consutancy
    Keyskills: , FPGA, I2c, VLSI... Verilog..., Ethernet, Software, ASIC
    Summary: Rtl Front end design engineerRTL frontend design Engineer• 4-6 year’s experience in Verilog/System Verilog RTL design and verification• RTL synthesis using Design compiler• FPGA Flow using Xilinx•..
    Chennai
    4-6 years
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    Posted : 15th Oct 2017

  • RTL frontend design Engineer

    qusol consutancy
    Keyskills: , FPGA, I2c, VLSI... Verilog..., Ethernet, Software, ASIC
    Summary: RTL frontend design EngineerRTL frontend design Engineer• 6 - 8 year’s experience in Verilog/System Verilog RTL design and verification• RTL synthesis using Design compiler• FPGA Flow using Xilinx..
    Chennai
    6-8 years
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    Posted : 15th Oct 2017

  • Senior Digital Design Engineer / Principal Design Engineer

    Mulya Technologies
    Keyskills: , Verilog, ASIC... Architecture, FPGA
    Summary: Our client is the leader in high-speed connectivity solutions for data centers,enterprise and mobile applications.Exp in networking ASIC architecture, micro-architecture .PCIe , Ethernet (layer 2/..
    Bengaluru / Bangalore
    5-12 years
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    Posted : 18th Oct 2017

  • DIGITAL DESIGN MANAGER

    Mulya Technologies
    Keyskills: , Verilog, ASIC... Architecture, FPGA
    Summary: Our client is the leader in high-speed connectivity solutions for data centers,enterprise and mobile applications.Full exp of digital design methodologies and tools including RTL coding in Verilog..
    Bengaluru / Bangalore
    12-22 years
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    Posted : 18th Oct 2017

  • VLSI ADVANCED FRONT-END PROGRAMME

    Astute Solution Private Limited
    Keyskills: Verilog..., Digital Design, VLSI
    Summary: Greetings of the day! VLSI/ASIC Trainee Engineer for Fresher's ECE/EEE/ICE/E&I. We will be conducting interview/written test on Digital and verilog.
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    0-0 years
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    Posted : 10th Oct 2017

  • Sr Engineer(UVM / System Verilog / AXI / AXI3 / AXI4)

    Contract Jobs
    US Tech Solutions
    Keyskills: System Verilog
    Summary: Candidate must have strong SV and UVM background - Worked on AXI3/4, ACE coherent interfaces - Excellent debugging skills using simulators and good communication. - Perl scripting. - Know..
    Hyderabad / Secunderabad
    5-15 years
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    Posted : 20th Oct 2017

  • VLSI Tech Lead - System Design

    Wipro Ltd.
    Keyskills: VLSI Board
    Summary: Job Description , Expertise with a proven track record in RF/wireless systems architecture and system design, minimum 10+ years’ experience , Good knowledge of wireless technologies – GSM, LTE, WC..
    Bengaluru / Bangalore
    5-8 years
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    Posted : 19th Oct 2017

  • VLSI Tech Lead - System Design

    Wipro Ltd.
    Keyskills: VLSI Board
    Summary: Job Description , Expertise with a proven track record in RF/wireless systems architecture and system design, minimum 10+ years’ experience Good knowledge of wireless technologies – GSM, LTE, WCDM..
    Bengaluru / Bangalore
    5-8 years
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    Posted : 19th Oct 2017

  • VLSI Architect

    Wipro Ltd.
    Keyskills: VLSI
    Bengaluru / Bangalore
    10-15 years
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    Posted : 19th Oct 2017

  • Emulation requirement

    qusol consutancy
    Keyskills: , ASIC, FPGA..., Verilog, C, Software
    Summary: Qusol is recruiting for its Semi-conductor client in Bangalore for Emulation RequirementJob DescriptionFPGA EmulationPorting ASIC RTL on FPGAFPGA specific logic developmentHe/she should be able to..
    Bengaluru / Bangalore
    4-8 years
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    Posted : 15th Oct 2017

  • Principal Design Engineer- Bangalore

    qusol consutancy
    Keyskills: , ASIC, CPU..., Verilog, Software..., Modelsim, VLSI
    Summary: Principal Design EngineerDescriptionSoC level RTL Integration of 32 bit microcontroller productTechnical support to the SoC team on integration and System level verification issuesMaintaining CVS ..
    Bengaluru / Bangalore
    6-10 years
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    Posted : 15th Oct 2017

  • Staff IC Design Engineer - Project Lead / Manager -Chennai

    qusol consutancy
    Keyskills: , Software, ASIC, VLSI... Verilog
    Summary: Staff IC Design Engineer - Project Lead / ManagerThis req is for a leading Semi-Conductor client for Chennai location.Responsibilities:Lead MCU-based Global SoC Project Teams of 10-20 people, comp..
    Chennai
    8-13 years
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    Posted : 15th Oct 2017

  • DFT Engineer - Bangalore and Onsite

    qusol consutancy
    Keyskills: , Software, IP, ASIC, VLSI... Verilog
    Summary: Work PackageVerification of the test logic, test pattern generation, test pattern re-simulation (unit delay and timing) for Synopsys IPs: DDR3/2, PCIe, and USB2/3 within the SOCUse IP provided tes..
    Bengaluru / Bangalore
    4-8 years
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    Posted : 15th Oct 2017

  • Principal Digital Design Verification Engineer-

    Mulya Technologies
    Keyskills: Verification", " ASIC... Verification", Verilog..., "System Verilog", UVM
    Summary: Our client is the leader in high-speed connectivity solutions for data centers,enterprise and mobile applications.Languages: Must have experience in Verilog/SystemVerilog.Methodology: UVM (must) a..
    Bengaluru / Bangalore
    12-18 years
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    Posted : 18th Oct 2017

  • Digital Design Verification Engineer- SMTS

    Mulya Technologies
    Keyskills: Verification", " ASIC... Verification", Verilog..., "System Verilog", UVM
    Summary: Our client is the leader in high-speed connectivity solutions for data centers,enterprise and mobile applications.Languages: Must have experience in Verilog/SystemVerilog.Methodology: UVM (must) a..
    Bengaluru / Bangalore
    8-15 years
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    Posted : 18th Oct 2017

  • VLSI Engineer - Verification

    Wipro Ltd.
    Keyskills: VLSI HVL
    Bengaluru / Bangalore
    1-3 years
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    Posted : 13th Oct 2017

  • Sr Engineer(System Verilog / UVM / AXI / AXI3 / AXI4)

    Contract Jobs
    US Tech Solutions
    Keyskills: Verilog", "UVM", "AXI",
    Summary: Candidate must have strong SV and UVM background - Worked on AXI3/4, ACE coherent interfaces - Excellent debugging skills using simulators and good communication. - Perl scripting. - Knowledg..
    Hyderabad / Secunderabad
    5-15 years
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    Posted : 13th Oct 2017

  • Urgent Opening for Sr Engineer(uvm / system Verilog / axi / axi3 / 4)

    Contract Jobs
    US Tech Solutions
    Keyskills: Verilog", "UVM", "AXI",
    Summary: Candidate must have strong SV and UVM background - Worked on AXI3/4, ACE coherent interfaces - Excellent debugging skills using simulators and good communication. - Perl scripting. - Knowledg..
    Hyderabad / Secunderabad
    5-15 years
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    Posted : 13th Oct 2017

  • VLSI Engineer - System Design

    Wipro Ltd.
    Keyskills: VLSI Board
    Bengaluru / Bangalore
    3-5 years
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    Posted : 12th Oct 2017

  • VLSI Digital DFT And Test Architect

    Wipro Ltd.
    Keyskills: ATPG - VLSI
    Summary: Job Description , Key skills required for the job are: , * ATPG - VLSI Automatic Test Pattern Generation (Mandatory) , * VLSI-VERIFICATION PLANNING , * VLSI Memory BIST and Boundary SCAN , * ATPG ..
    Bengaluru / Bangalore
    8-10 years
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    Posted : 11th Oct 2017

  • Urgently required " Asic Verification" with one of our client at Pune.

    Leadex Soluitons LLP
    Keyskills: " Asic
    Summary: Job Role • Develop verification environment and tests to perform Functional (RTL) testing at IP level and SoC Level • Develop IP level/SoC level test plans based on the design/..
    Pune
    4-8 years
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    Posted : 11th Oct 2017

  • VLSI Engineer - DFT

    Wipro Ltd.
    Keyskills: VLSI Design
    Bengaluru / Bangalore
    1-3 years
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    Posted : 11th Oct 2017

  • Project Lead

    Sheer Sources
    Keyskills: Delivery, Asic... Verilog, UVM, PCI
    Summary: SOC Verification Direct Project Delivery Complex ASIC Projects System Verilog & UVM PCI, Ethernet, DDR, USB, Bluetooth Developing VIPs
    Bengaluru / Bangalore
    17-26 years
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    Posted : 10th Oct 2017

  • FPGA, Verilog, 4 - 9 years

    Upgrade HR Consulting Private Limited
    Keyskills: FPGA, Verilog..., VHDL
    Bengaluru / Bangalore
    4-9 years
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    Posted : 26th Sep 2017

  • Urgent opening for ASIC Design verification for Bangalore / Chennai location.

    Magna Infotech Limited
    Keyskills: " Asic Design", ..." asic verification...", " Asic Design
    Bengaluru / Bangalore, Chennai
    3-15 years
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    Posted : 9th Oct 2017

  • Firmware Developer

    Asap Info Systems Private Limited
    Keyskills: , Rtos, Vlsi
    Summary: Skills: Firmware Developer Experience: 2 - 7 yrs Only immediate joiners / not working candidates are preferred.
    Hyderabad / Secunderabad
    3-7 years
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    Posted : 20th Oct 2017

  • VLSI Engineer - AMS

    Wipro Ltd.
    Keyskills: Analog Layout
    Bengaluru / Bangalore
    3-5 years
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    Posted : 19th Oct 2017

  • FPGA Synthesis – Product Engineer

    Kaizen SRA Technologies Private Limited
    Keyskills: FPGA, Synthesis..., VHDL, System... Verilog, VMM, VERA, Perl
    Summary: FPGA Synthesis – Product Engineer | Experience (5-8 years) | Work Location: Noida, IN
    Noida
    5-9 years
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    Posted : 5th Oct 2017

  • Physical Design engineers req

    qusol consutancy
    Keyskills: , python, ASIC, Routing..., Software, tcl, VLSI
    Summary: RequirementsMust have experience with multiple successful tapeouts for 65nm and smaller geometries.The candidate needs to be self-motivated and an excellent team player, experienced in working wit..
    Chennai
    8-15 years
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    Posted : 15th Oct 2017

  • Verification with USB and System Verilog

    qusol consutancy
    Keyskills: , Verilog, Software
    Summary: This requirement is for our fast-growing Technology client that specializes in creation of Intellectual Properties, Frameworks and Solutions for the Networking, Enterprise and Device Mobility mark..
    Chennai
    4-7 years
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    Posted : 15th Oct 2017

  • Verification with SATA Protocol

    qusol consutancy
    Keyskills: , ASIC, Protocol, VLSI
    Summary: Verification Engineer with SATA Protocol Knowledge.Exp Range : 4+ YearsNotice Period : 2 to 3 weeks most advantageousJD for this requirementProficient Knowledge in SATA 3/ SATA 2 Protocols with UV..
    Bengaluru / Bangalore
    4-8 years
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    Posted : 15th Oct 2017

  • Urgent Opening for SOC Verification

    qusol consutancy
    Keyskills: , ASIC, VLSI
    Summary: SOC VerificationExperience: 5 to 8 yearsJob Description: • Our Requirement is for SoC Verification Engineer having 5-8 Yrs of Experience. • He Should have Worked on SoC Verification,Having Knowled..
    Bengaluru / Bangalore
    5-8 years
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    Posted : 15th Oct 2017

  • UVM (Block Level) Verification - Bangalore

    qusol consutancy
    Keyskills: VHDL, Verilog
    Summary: System Verilog, UVM/OVM. Also Person should understand blocks verification at chip level Top level verification know-how Verification Plan C Testbench Development VHDL/Verilog simulation and debug..
    Bengaluru / Bangalore
    5-10 years
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    Posted : 15th Oct 2017

  • Senior Verification Engineer – System Verilog, OVM / UVM -Bangalore and Onsite

    qusol consutancy
    Keyskills: Verilog
    Summary: Senior Verification Engineer – System Verilog, OVM / UVM Skillset Must HaveBlock and Top level verification know-howVerification Plan DevelopmentSystem Verilog/OVM or UVMTestbench DevelopmentVHDL/..
    Bengaluru / Bangalore
    3-12 years
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    Posted : 15th Oct 2017

  • SystemC, TLM Engineers req - Bangalore

    qusol consutancy
    Keyskills: , ASIC, VLSI
    Summary: We are seeking an experienced professional in- SystemC, TLM 2.0, Modeling- C/C++Experience category is 4 to 8 years.Notice Period: 15 Days or lessLocation : BangaloreExcellent verbal and written c..
    Bengaluru / Bangalore
    4-8 years
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    Posted : 15th Oct 2017
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