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  • MTS / SMTS / Principal ASIC Design Engineer - Network Security

    Mulya Consulting
    Keyskills: RTL, Verilog, ASIC, SOC, VHDL
    Summary: Our client ( US Based MNC listed in New York Stock Exchange) is a leading developer, and global supplier of high-speed connectivity solutions for data centers.- Extensive experience with MACSEC/IP..
    Bengaluru / Bangalore
    4-14 years
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    Posted : 22nd Apr 2018

  • MTS / SMTS / Principal ASIC Design Engineer- CSI / DSI Design and Integration

    Mulya Consulting
    Keyskills: Verilog, ASIC, SOC, VHDL, Front En
    Summary: Our client ( US Based MNC listed in New York Stock Exchange) is a leading developer, and global supplier of high-speed connectivity solutions for data centers.experience in integration and validat..
    Bengaluru / Bangalore
    4-14 years
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    Posted : 22nd Apr 2018

  • MTS / SMTS / Principal ASIC Design Engineer

    Mulya Consulting
    Keyskills: RTL, Verilog, VHDL, SV..., System Verilog, DSP, PCIE, Ethernet..., ASIC, SoC
    Summary: Our client ( US Based MNC listed in New York Stock Exchange) is a leading developer, and global supplier of high-speed connectivity solutions for data centers.DSP fundamentals/Filter/FFT design/Da..
    Bengaluru / Bangalore
    4-14 years
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    Posted : 22nd Apr 2018

  • VLSI Design Engineer

    Ethos HR Management And Projects Private Limited
    Keyskills: VLSI, VERILOG, EDA, RTL, FPGA
    Summary: Excellent opportunity for VLSI Design Professionals @Pune & Ahmedabad for well known MNC
    Bengaluru / Bangalore
    2-8 years
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    Posted : 19th Apr 2018

  • VLSI Design Engineer

    Ethos HR Management And Projects Private Limited
    Keyskills: VLSI, VERILOG, EDA, RTL, FPGA
    Summary: Excellent opportunity for VLSI Design Professionals @Pune & Ahmedabad for well known MNC
    Ahmedabad, Pune
    2-8 years
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    Posted : 19th Apr 2018

  • MTS / SMTS / Principal ASIC Design Engineer – MAC

    Mulya Consulting
    Keyskills: MAC, PTP, PCS, System Verilog..., ASIC, SoC, micro-architecture
    Summary: Our client ( US Based MNC listed in New York Stock Exchange) is a leading developer, and global supplier of high-speed connectivity solutions for data centers.RTL Design and implementation of MAC/..
    Bengaluru / Bangalore
    4-14 years
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    Posted : 22nd Apr 2018

  • MTS / SMTS / Principal ASIC Design Engineer - PCI Design and Integration

    Mulya Consulting
    Keyskills: PCI, PCIE, RTL, Verilog..., System Verilog, SV, Lint, CDC, DFT..., LEC, UPF, DMA, PHY, Serdes, ASIC
    Summary: Our client ( US Based MNC listed in New York Stock Exchange) is a leading developer, and global supplier of high-speed connectivity solutions for data centers.Extensive experience in integration a..
    Bengaluru / Bangalore
    4-14 years
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    Posted : 22nd Apr 2018

  • RTL Verification Engineer

    Neugene International Solutions
    Keyskills: Design, ASIC, SOC, EDA, Vlsi Design...RTL, RTL Design, Verilog, SOC
    Summary: JD for RTL Verification: No Of positions:- 25 Location :-Bangalore/Noida Exp :- 2-5 yrs Engineering process and methodologies. Exposure to the complete lifecycle of ASIC Flow is essential. I..
    Bengaluru / Bangalore, Mumbai
    2-5 years
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    Posted : 20th Apr 2018

  • SMTS / Principal FPGA Design Engineer

    Koral Human Resource Consultants
    Keyskills: FPGA, RTL, Asic, RTL
    Summary: - 10+ years of FPGA Design and Debug experience (preferably with Xilinx Ultrascale+ and Virtex7)
    Bengaluru / Bangalore
    6-14 years
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    Posted : 20th Apr 2018

  • RTL : Principal Engineer :

    Koral Human Resource Consultants
    Keyskills: RTL, FPGA, Asic
    Summary: Product based MNC : Hyderabad
    Hyderabad / Secunderabad
    8-16 years
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    Posted : 20th Apr 2018

  • Digital Design Engineer / Senior Digital Design Engineer

    Koral Human Resource Consultants
    Keyskills: Asic, RTL, FFT, FPGA, DSP
    Summary: § Develop key blocks of logic in a next generation physical layer/mixed signal SOCs § Perform hardware feasibility analysis and come up with a micro-architecture specification helping it map to..
    Bengaluru / Bangalore
    5-10 years
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    Posted : 20th Apr 2018

  • ASIC / IP / Soc Verification for Ahmedabad / Bangalore / Pune location

    Work Technologies
    Keyskills: Verification Engineer, Asic Verification... Engineers, Asic Verificatio
    Summary: Hiring for Engineer, Sr. Engineer and Lead for ASIC Soc Verification
    Ahmedabad, Bengaluru / Bangalore
    3-10 years
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    Posted : 21st Apr 2018

  • SMTS / Principal ASIC Design Engineer – MAC

    Koral Human Resource Consultants
    Keyskills: Asic, RTL, MAC
    Summary: - 10+ years of ASIC RTL Design experience and Verilog/System Verilog proficiency
    Bengaluru / Bangalore
    7-14 years
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    Posted : 20th Apr 2018

  • SMTS / Principal ASIC Design Engineer- CSI / DSI Design and Integration

    Koral Human Resource Consultants
    Keyskills: Asic, RTL, Lint, CSI, DSI,
    Summary: - 10+ years of ASIC RTL Design experience and Verilog/System Verilog proficiency
    Bengaluru / Bangalore
    8-14 years
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    Posted : 20th Apr 2018

  • SMTS / Principal ASIC Design Engineer - Network Security

    Koral Human Resource Consultants
    Keyskills: micro-architecture, Asic, RTL
    Summary: - 10+ years of ASIC RTL Design experience and Verilog/System Verilog proficiency - Experience with multiple clock and power domains
    Bengaluru / Bangalore
    6-14 years
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    Posted : 20th Apr 2018

  • SMTS / Principal ASIC Design Engineer - PCI Design and Integration

    Koral Human Resource Consultants
    Keyskills: Asic, RTL, PCIe, IP, PHY
    Summary: - 10+ years of ASIC RTL Design experience and Verilog/System Verilog proficiency
    Bengaluru / Bangalore
    10-15 years
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    Posted : 20th Apr 2018

  • VLSI Engineer - Verification

    Wipro Limited
    Keyskills: ASIC Verification
    Bengaluru / Bangalore
    3-5 years
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    Posted : 18th Apr 2018

  • Technical Support Engineer

    Talent Corner Hr Services Private Limited
    Keyskills: VLSI, VERILOG
    Summary: Primarily to work on live project and support students on practical assignments. Deliver the training as per given syllabus. Develop and implement innovative instructional methods. Guide,..
    Bengaluru / Bangalore
    0-2 years
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    Posted : 17th Apr 2018

  • Verification Engineer

    Prabhu Venkatachalam Dev ( Proprietor Of Stress Consulting)
    Keyskills: Verification Engineer, Asic... Verilog, VMM
    Summary: ASIC Verifiaction/SOC Verification/IP Verification Candidate should be into VLSI Domain.
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-13 years
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    Posted : 17th Apr 2018

  • VLSI Tech Lead - Design

    Wipro Limited
    Keyskills: ASIC Design
    Summary: Job Description , Key skills required for the job are: , ASIC Design-L3 (Mandatory) , Digital ASIC Design Concepts-L3 , Scope of Work ( Need to get more details. This is my current understanding )..
    Pune
    5-8 years
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    Posted : 17th Apr 2018

  • VLSI Tech Lead - DFT

    Wipro Limited
    Keyskills: VLSI Design For Testability
    Summary: Job Description , Key skills required for the job are: , * VLSI Design For Testability - DFT-L3 (Mandatory) , * VLSI Design For Testability - DFT-L3 (Mandatory) , * VLSI Design For Testability - D..
    Bengaluru / Bangalore
    5-8 years
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    Posted : 18th Apr 2018

  • VLSI Digital Design And Verification Architect

    Wipro Limited
    Keyskills: VLSI-VERIFICATION PLANNING
    Summary: Job Description , Key skills required for the job are: , * VLSI-VERIFICATION PLANNING-L3 (Mandatory) , * ASIC Verification-L3 , * Digital ASIC Design Concepts-L3 , 10+yrs of exp with Design Verifi..
    Bengaluru / Bangalore
    8-10 years
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    Posted : 17th Apr 2018

  • VLSI Tech Lead - System Design

    Wipro Limited
    Keyskills: VLSI Board Design
    Summary: Job Description , Job Responsibilities : , Design, simulate, analyze and verify Transmitter & receiver design , Review design, schematics, layout, board/system test specifications and test reports..
    Bengaluru / Bangalore
    5-8 years
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    Posted : 17th Apr 2018

  • VLSI Engineer - Verification

    Wipro Limited
    Keyskills: VLSI HVL Verification
    Hyderabad / Secunderabad
    3-5 years
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    Posted : 16th Apr 2018

  • VLSI Tech Lead - System Design

    Wipro Limited
    Keyskills: VLSI Board Design
    Summary: Job Description , Key skills required for the job are: , * VLSI Board Design-L3 (Mandatory) , Minimum work experience:5 - 8 Years , High speed board testing , Signal integrity analysis , Board tes..
    Bengaluru / Bangalore
    5-8 years
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    Posted : 16th Apr 2018

  • VLSI Tech Lead - AMS

    Wipro Limited
    Keyskills: ASIC Verification
    Summary: Job Description , Key skills required for the job are: , * ASIC Verification-L3 (Mandatory) , Key skills required for the job are: , * ASIC Verification-L3 (Mandatory) , * , Key skills required fo..
    Bengaluru / Bangalore
    5-8 years
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    Posted : 13th Apr 2018

  • Verification Engineer

    Contract Jobs
    Libsys IT Services Private Limited
    Keyskills: IP , SoC , ASIC, System Verilog
    Summary: • Candidate should having 4-12 years of verification for IP or SoC for ASIC
    Chennai
    4-12 years
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    Posted : 12th Apr 2018

  • VLSI Tech Lead - AMS

    Wipro Limited
    Keyskills: VLSI RF Circuit design
    Summary: Job Description , Job Responsibilities : , Design, simulate, analyze and verify Transmitter & receiver design , Review design, schematics, layout, board/system test specifications and test reports..
    Bengaluru / Bangalore
    5-8 years
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    Posted : 13th Apr 2018

  • Project Lead VLSI

    Wipro Limited
    Keyskills: ASIC Design
    Bengaluru / Bangalore
    5-8 years
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    Posted : 10th Apr 2018

  • US MNC : Firmware Engineer II ( FPGA) @Ahmedabad

    Heads2you
    Keyskills: Firmware , FPGA , Serial IO..., Embedded Processor, DSP, HDL ( Verilog... / VHDL) , real time data
    Summary: Firmware ,FPGA , Serial IO, Embedded Processor, DSP, HDL (Verilog/VHDL) , real time data acquisition, filter design , Embedded C/C++ , hard real time, multi-threaded , debugging , XML , IP network..
    Ahmedabad
    8-15 years
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    Posted : 22nd Mar 2018

  • SMTS / Principal FPGA Design Engineer

    Koral Human Resource Consultants
    Keyskills: FPGA, VIVADO, RTL, Asic
    Summary: - 10+ years of FPGA Design and Debug experience (preferably with Xilinx Ultrascale+ and Virtex7) - Proficiency in using Xilinx Vivado/Coregen/Synplify and development/maintenance of Timing/IO co..
    Bengaluru / Bangalore
    9-14 years
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    Posted : 5th Apr 2018

  • SMTS / Principal ASIC Design Engineer- CSI / DSI Design and Integration

    Koral Human Resource Consultants
    Keyskills: Asic, FPGA, CSI, DSI, DPHY
    Summary: - Extensive experience in integration and validation of CSI/DSI/DPHY/CPHY/other MIPI cores (including controller and SerDes) - Experience with CSI/DSI debug - RTL Design and implementation o..
    Bengaluru / Bangalore
    9-14 years
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    Posted : 5th Apr 2018

  • SMTS / Principal ASIC Design Engineer – MAC

    Koral Human Resource Consultants
    Keyskills: Asic, FPGA, FFT, MAC, RTL
    Summary: - Experience with multiple clock and power domains - Extensive experience with Networking protocol and implementations - RTL Design and implementation of Switch/MAC/PTP/PCS cores
    Bengaluru / Bangalore
    9-14 years
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    Posted : 5th Apr 2018

  • RTL Verification engineer

    Neugene International Solutions
    Keyskills: Methodology, Rtl Design Engineer, Verilog..., System Verilog, SOC Verification..., VLSI Design
    Summary: RTL Verification engineer with 2-5 yrs experience
    Bengaluru / Bangalore, Noida
    2-5 years
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    Posted : 10th Apr 2018

  • Hihgly urgent requirement for ARM-Cortex wiht Verification, System Verilog, UVM and C for Bangalore.

    Ascent Cyber Solutions
    Keyskills: ARM, Cortex, System Verilog
    Summary: Hi, Good Afternoon!! Hope you are doing well!! We have gone through your profile on portal; we are looking for ARM Cortex with Verification, UVM, System Verilog and C, Exp : 5 to 15 Years f..
    Hyderabad / Secunderabad
    5-15 years
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    Posted : 12th Apr 2018

  • VLSI Tech Lead - Design

    Wipro Limited
    Keyskills: FPGA design - Xilinx Device
    Summary: Job Description , Key skills required for the job are: , * FPGA design - Xilinx Device Architecture-L3 (Mandatory) , should be very good in Xilinx FPGA synthesis and should be able to synthesis an..
    Bengaluru / Bangalore
    5-8 years
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    Posted : 9th Apr 2018

  • FPGA Verification Engineers

    Siri AB India Private Limited
    Keyskills: ASIC, SOC, FPGA, system... verilog (with and without space)
    Summary: we are looking for FPGA Verification Engineers
    Sweden
    6-14 years
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    Posted : 20th Mar 2018

  • Asic Verification Engineers

    Koral Human Resource Consultants
    Keyskills: Asic, System Verilog, UVM
    Summary: Asic Verification Engineers
    Malaysia, Singapore
    3-7 years
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    Posted : 3rd Apr 2018

  • VLSI Tech Lead - AMS

    Wipro Limited
    Keyskills: VLSI Physical Design
    Summary: Job Description , As aLead, you are responsible for managing a small team of engineers and drive delivery of a small module within a project.You are responsible for functional/technical track of a..
    Hyderabad / Secunderabad
    5-8 years
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    Posted : 11th Apr 2018
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