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Mulya Technologies

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  • Mulya Technologies
    Keyskills: RTLCoding, Verilog, ASIC Architecture, Micro-architecture, SystemVerilog, Synthesis, Lint, CDC, STA, Formality, PCIE, PHY, Ethernet, GMII, XGMII, DSP, Computer Architecture, FPGA
    Summary: Our client is the leader in high-speed connectivity solutions for data centers,enterprise and mobile applications.Full exp of digital design methodologies and tools including RTL coding in Verilog..
    Bengaluru / Bangalore
    12-22 years
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    Posted : 21st Dec 2017
  • Mulya Technologies
    Keyskills: RTLCoding, Verilog, ASIC Architecture, Micro-architecture, SystemVerilog, Synthesis, Lint, CDC, STA, Formality, PCIE, PHY, Ethernet, GMII, XGMII, DSP, Computer Architecture, FPGA
    Summary: Our client is the leader in high-speed connectivity solutions for data centers,enterprise and mobile applications.Exp in networking ASIC architecture, micro-architecture .PCIe , Ethernet (layer 2/..
    Bengaluru / Bangalore
    8-13 years
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    Posted : 12th Dec 2017
  • Mulya Technologies
    Keyskills: SV, "SoC Verification", "ASIC Verification", Verilog, "System Verilog", UVM, Specman, Perl, Python, PCIE, Ethernet
    Summary: Our client is the leader in high-speed connectivity solutions for data centers,enterprise and mobile applications.Languages: Must have experience in Verilog/SystemVerilog.Methodology: UVM (must) a..
    Bengaluru / Bangalore
    12-18 years
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    Posted : 12th Dec 2017
  • Mulya Technologies
    Keyskills: "Floor planning", CTS, , DRC, LVS, TCL, STA, DFT, ICC, "first Encounter", "SoC Encounter, Synthesis, DC, RC, ICC2, Innovus
    Summary: Our Client applies an open business model that enables the company to uniquely choose best-in-industry IP, design methodologies, tools, software,Physical design tasks include floor-planning, place..
    Bengaluru / Bangalore
    6-13 years
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    Posted : November 2017
  • Mulya Technologies
    Keyskills: STA, "Static Timing Analysis", SSTA, "physical Design", DFT, PrimeTime, "Prime Time", Tempus, PT, PTSI, Synthesis, RC, DC, "RTL Compiler", "DC Compiler", ATE, RMP, "Timing Closure", signoff, constraints
    Summary: Our Client applies an open business model that enables the company to uniquely choose best-in-industry IP, design methodologies, tools, software, packaging, manufacturing, and test capabilities.Co..
    Bengaluru / Bangalore
    6-13 years
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    Posted : November 2017
  • Mulya Technologies
    Keyskills: STA, "Static Timing Analysis", SSTA, "physical Design", DFT, PrimeTime, "Prime Time", Tempus, PT, PTSI, Synthesis, RC, DC, "RTL Compiler", "DC Compiler", ATE, RMP, "Timing Closure", signoff, constraints
    Summary: Our Client applies an open business model that enables the company to uniquely choose best-in-industry IP, design methodologies, tools, software, packaging, manufacturing, and test capabilities.Co..
    Bengaluru / Bangalore
    10-16 years
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    Posted : October 2017
  • Mulya Technologies
    Keyskills: SV, "SoC Verification", "ASIC Verification", Verilog, "System Verilog", UVM, Specman, Perl, Python, PCIE, Ethernet
    Summary: Our client is the leader in high-speed connectivity solutions for data centers,enterprise and mobile applications.Languages: Must have experience in Verilog/SystemVerilog.Methodology: UVM (must) a..
    Bengaluru / Bangalore
    8-15 years
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    Posted : October 2017
  • Mulya Technologies
    Keyskills: ASIC Verification, networking , iWARP , RDMA, Switching, routing, TCP/IP, VMM, OVM, UVM, SystemVerilog, Vera,
    Summary: Experience of ASIC/SOC sub-system and system verification and FPGA validation.Networking product architectures such as iWARP and RDMA, L2/L3 Switching, routing, TCP/IP, etc. and embedded processor..
    Bengaluru / Bangalore
    11-18 years
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    Posted : September 2017
  • Mulya Technologies
    Keyskills: RTL design, ASIC Design, bus protocols like AMBA ACP/AXI/AHB/APB, high speed memory interfaces such as DDR, designing networking products for the protocols like iWarp/RDMA, TCP/IP, iSCSI, L2/L3 Switching, routing etc.
    Summary: Responsible for ASIC design, working closely with the SW, collaborating design and verification teams. Specifically, responsible for designing networking products for the protocols like iWarp/RDM..
    Bengaluru / Bangalore
    7-12 years
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    Posted : September 2017
  • Mulya Technologies
    Keyskills: DFT, Design For Testability, SCAN, BCSAN, BIST architecture, MBIST, hard IP (e.g. Serdes, DDR, USB, SATA, etc.) related DFT implementations and implementation , STA, ATE test
    Summary: Experience in DFT implementation strategies for complex SoC of various technologies Thorough knowledge on the SCAN, BCSAN, BIST architecture, implementations and test pattern development using..
    Bengaluru / Bangalore
    12-20 years
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    Posted : September 2017
  • Mulya Technologies
    Keyskills: LTE, EPC, HSS, MME, SGW, PGW, S1AP, NAS, GTP, C, C++, Data Structures, Algorithms, Linux, GSM, 3G, 5G, TCP, UDP, SCTP
    Summary: European Telecom is a leader in advanced wireless communication with 20 years of exp, provides a complete suite of software IPR and hardware platforms.the job involves design,development and veri..
    Delhi, Gurgaon
    2-7 years
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    Posted : September 2017
  • Mulya Technologies
    Keyskills: LTE, PHY, DSP, MATLAB, "Physical Layer", Layer1, C, "Data Structures", C++, Linux, 4G, 5G, Wimax, EnB, EnodeB, 3GPP, pusch, pucch, prach, pdsch, pdcch
    Summary: European TelecomMNC is a leader in advanced wireless communication with two decades of exp, provides a complete suite of software IPR and hardware platforms. Nature of Job Development, Enhanceme..
    Delhi, Gurgaon
    2-7 years
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    Posted : September 2017
  • Mulya Technologies
    Keyskills: STA, "Static Timing Analysis", SSTA, "physical Design", DFT, PrimeTime, "Prime Time", Tempus, PT, PTSI, Synthesis, RC, DC, "RTL Compiler", "DC Compiler", ATE, RMP, "Timing Closure", signoff, constraints
    Summary: Our Client applies an open business model that enables the company to uniquely choose best-in-industry IP, design methodologies, tools, software, packaging, manufacturing, and test capabilities.Co..
    Bengaluru / Bangalore
    3-7 years
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    Posted : September 2017
  • Mulya Technologies
    Keyskills: DFT, "Design For testability", ATPG, BIST, LBIST, MBIST, SCAN, BSCAN, JTAG, ATE, Vtran, Simutest, STA, "Physical Design", Synthesis, DC, RC, "Prime Time"
    Summary: Our Client applies an open business model that enables the company to uniquely choose best-in-industry IP, design methodologies, tools, software,Complete understanding of DFT concepts and flow (sc..
    Bengaluru / Bangalore
    6-13 years
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    Posted : September 2017
  • Mulya Technologies
    Keyskills: DFT, "Design For testability", ATPG, BIST, LBIST, MBIST, SCAN, BSCAN, JTAG, ATE, Vtran, Simutest, STA, "Physical Design", Synthesis, DC, RC, "Prime Time"
    Summary: Our Client applies an open business model that enables the company to uniquely choose best-in-industry IP, design methodologies, tools, software,Complete understanding of DFT concepts and flow (sc..
    Bengaluru / Bangalore
    3-7 years
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    Posted : September 2017
  • Mulya Technologies
    Keyskills: STA, Static Timing Analysis, Synthesis, block level and full chip level synthesis and timing constraints, PERL/TCL scripting, Contribute to SCAN, MBIST and JTAG timing constraints/analysis.
    Summary: AppliedMicro (Noe Macom)--Product Company-- is a global leader in energy conscious computing and connectivity solutions for telco, enterprise, data center, and SMB applications STA, block level..
    Bengaluru / Bangalore
    5-9 years
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    Posted : August 2017
  • Mulya Technologies
    Keyskills: DFT, Design For Testability, SCAN, MBIST and JTAG, ATPG, implementation and verification, gate-level simulations, timing constraints/analysis, DFT methodology/tooling for 16/7nm flow.
    Summary: AppliedMicro (Now Macom) -Product Company is a global leader in energy conscious computing Responsible for DFT, SCAN, MBIST and JTAG, Architecture, implementation, verification, vector generation..
    Bengaluru / Bangalore
    4-7 years
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    Posted : August 2017
  • Mulya Technologies
    Keyskills: Physical Design, STA, Static timing analysis, PTSI, Prime time, First Encounter, Nanoroute, Calibre, StarRC, Conformal, Floor Planning, P&R, Physical Verification, EM/IR, Sign-Off Flows, Finfet, Innovus, ICC2
    Summary: Semicon Product MNC.BS / MS in EE/CSE from a reputed University. Good knowledge of EDA tools from Synopsys, Cadence and Mentor required. In particular experience with PTSI, First Encounter, Nano..
    Bengaluru / Bangalore
    2-12 years
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    Posted : August 2017
  • Mulya Technologies
    Keyskills: ADC, DAC, Serdes, SAR, Interleaved, Spectre, PLL, "Circuit Design", Phase Locked Loop, DLL
    Summary: AppliedMicro is an innovative global leader in system-on-a-chip semiconductors for high-speed communications and high-performance embedded processing.Expert Knowledge from concept to production qu..
    Bengaluru / Bangalore
    5-12 years
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    Posted : August 2017
  • Mulya Technologies
    Keyskills: ASIC Verification, UVM, SystemVerilog and OOP programming Ethernet , OTN , SONET verification experience
    Summary: AppliedMicro (Now Macom)--Product Company--is a global leader in energy conscious computing Strong exp of ASIC methodologies & tooling Strong exp of UVM, SystemVerilog & OOP programming ..
    Pune
    10-17 years
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    Posted : August 2017
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