Analog Circuit Design Engineers
Experience: 2 to 7years
M.Tech with 2-5 years of experience , in SoC design for low noise applications
Should have very good knowledge of impact of layout parasitic and post layout simulations
Hand-on experience in architecture evaluation, circuit level design and simulations of analog blocks
Should have worked block level end to end delivery and chip level integration experience is preferred
Silicon proven design is advantage
Hand on experience with Cadence Virtuoso Tools
Application domain : Camera application , low noise & Large die
1. Design of various low noise circuits like Bias blocks, Low noise amplifiers, Column ADCs (single/dual slop).
2. Integration of various blocks and interconnects and work closely with lead to achieve
3. Provide inputs for layout and work closely with layout to meet desired performance
4. Knowledge in Pixel performance matrix should be advantage
5. Strong written and verbal communication skills
6. Should be capable of working independently with minimal guidance.
We are a product based fab less VLSI Company, with expertise in the mixed signal custom chip development and specialized in the development of ROIC & Imaging sensors for custom needs. We are presently focusing on development of various advance imaging sensor for very niche applications and looking for the digital design engineer who can take a lead and effectively contribute to the development.
"Mining the knowledge Community"
Email: muday_bhaskar@ yahoo.com