You searched for:

hardware design jobs in bangalore

Refine Search

Top Employers

  • 165
  • 87
  • 78
  • 13
  • 43
  • 130
  • 128
  • 133
  • 102
  • 25
  • 165
  • 1
  • 1
  • 8
  • 9
  • 9
  • 155
Monster Poll
How would you rate your company on women-friendly policies?
Vote
1 - 40 of 165 Job(s)
  • Hitech Placements
    Keyskills: , Analog Digital, Hardware Design
    Summary: * Should have an In-depth Knowledge of Analog and Digital Hardware Design.* Able to Participate in Design Review Meetings and Appreciate at the System.* Sub - System Level from Hardware Quality Pe..
    Bengaluru / Bangalore
    10-15 years
    Share
    Posted : 24th Feb 2018
  • Mulya Consulting
    Keyskills: FPGA, RTL, Procol Analyzer, oscilloscope, Protocol Analyzer, Perl, TCL, PCIE, Serdes, PCS, Synplify, ultrascale, vertex
    Summary: Our client ( US Based MNC listed in New York Stock Exchange) is a leading developer, and global supplier of high-speed connectivity solutions for data centers.FPGA Design and Debug experience (pre..
    Bengaluru / Bangalore
    8-18 years
    Share
    Posted : 24th Feb 2018
  • Mulya Consulting
    Keyskills: PCI, PCIE, RTL, Verilog, System Verilog, SV, Lint, CDC, DFT, LEC, UPF, DMA, PHY, Serdes, ASIC, SoC, micro-architecture
    Summary: Our client ( US Based MNC listed in New York Stock Exchange) is a leading developer, and global supplier of high-speed connectivity solutions for data centers.Extensive experience in integration a..
    Bengaluru / Bangalore
    8-18 years
    Share
    Posted : 24th Feb 2018
  • Mulya Consulting
    Keyskills: MAC, PTP, PCS, System Verilog, SV, Lint, CDC, DFT, LEC, UPF, ASIC, SoC, micro-architecture
    Summary: Our client ( US Based MNC listed in New York Stock Exchange) is a leading developer, and global supplier of high-speed connectivity solutions for data centers.RTL Design and implementation of MAC/..
    Bengaluru / Bangalore
    8-18 years
    Share
    Posted : 24th Feb 2018
  • Mulya Consulting
    Keyskills: MIPI, CSI, DSI, CPHY, DPHY, RTL, Verilog, ASIC, SOC, VHDL, Front End Design, Lint, CDC, DFT, LEC, UPF, Serdes
    Summary: Our client ( US Based MNC listed in New York Stock Exchange) is a leading developer, and global supplier of high-speed connectivity solutions for data centers.experience in integration and validat..
    Bengaluru / Bangalore
    8-18 years
    Share
    Posted : 24th Feb 2018
  • Mulya Consulting
    Keyskills: RTL, Verilog, ASIC, SOC, VHDL, Front End Design, Lint, CDC, DFT, LEC, UPF, MACSEC, IPSec, AES, SHA, RSA
    Summary: Our client ( US Based MNC listed in New York Stock Exchange) is a leading developer, and global supplier of high-speed connectivity solutions for data centers.- Extensive experience with MACSEC/IP..
    Bengaluru / Bangalore
    8-18 years
    Share
    Posted : 24th Feb 2018
  • Koral Human Resource Consultants
    Keyskills: Manager , Hardware Design Engineer
    Bengaluru / Bangalore
    8-12 years
    Share
    Posted : 25th Jan 2018
  • L&T Technology Services
    Keyskills: Design, Designing, Designer, IC chip, Synthesis, Constraint Development, Linting, Lint, CDC, RFA, integrated circuit, CHip, Clock Domain Crossing, rtl, register transfer level
    Summary: Strong knowledge in IC chip design methodology.
    Bengaluru / Bangalore, Chennai
    4-8 years
    Share
    Company Profile
    Posted : 21st Feb 2018
  • L&T Technology Services
    Keyskills: Built-in self-test, SCAN, SCAN stuck-at, SCAN at-speed, Mentor Graphics EDT, On chip clock controller, OCC, Mentor Graphics TestKompress, BSCAN, MBIST, BIST, Mentor TestKompress, TestKompress, dft, design for testability, design for testability
    Summary: SCAN stuck-at and at-speed techniques. Fundamentals of SCAN stuck-at and at-speed techniques.
    Bengaluru / Bangalore, Chennai
    4-8 years
    Share
    Company Profile
    Posted : 21st Feb 2018
  • Ascent Cyber Solutions
    Keyskills: Scan insertion & ATPG, Pattern Simulation
    Summary: Hi, Good Evening!! Hope you are doing well!! We have gone through your profile on portal; we are looking for DFT Engineer with SCAN Insertion & ATPG, Pattern Simulation for Pune/Bangalore/H..
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-8 years
    Share
    Posted : 21st Feb 2018
  • Ascent Cyber Solutions
    Keyskills: Physical Design : Senior Engineer / Technical Lead / Architects. Floor Planning : PG Planning : Partitioning : Placement : Scan-chain-reordering : Clock Synthesis :
    Summary: We have gone through your profile on portal; we are looking for Physical Design with floor planning, PG planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, 3to 15 Years..
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-13 years
    Share
    Posted : 21st Feb 2018
  • Ascent Cyber Solutions
    Keyskills: Custom Layout, 7nm to 180nm, Analog and RF Layout Design, RF and Serdes
    Summary: We have gone through your profile on portal; we are looking for Custom Layout with technology 7nm to 180nm, Full Chip Layout, Cadence Virtuoso Layout Editor. It's a very urgent requirement.
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-8 years
    Share
    Posted : 21st Feb 2018
  • Ascent Cyber Solutions
    Keyskills: Asic Verification, RTL Testing, System Verilog, OVM, UVM
    Summary: We have gone through your profile on portal; we are looking for ASIC Verification with IP Level/SoC Level, Functional (RTL) Testing, Exp : 3 to 15 Years for Pune/Hyderabad/Bangalore location. It&#..
    Bengaluru / Bangalore, Pune
    3-13 years
    Share
    Posted : 21st Feb 2018
  • Ascent Cyber Solutions
    Keyskills: STA, ASIC Timing Constraints generation and timing Closure.
    Summary: We have gone through your profile on portal; we are looking for Expertise STA Tools (Primetime) and Flow, ASIC Timing constraints generation, Expert in Chip/ block level STA Pune/Bangalore/Hyderab..
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-13 years
    Share
    Posted : 21st Feb 2018
  • Roljobs Technology Services Private Limited
    Keyskills: Analog Design, DAC, ADC, PLL
    Summary: We are looking for Senior Analog Design Engineer for one of our Leading Product based Semiconductor client in Bangalore with good exposure in ADC/DAC.
    Bengaluru / Bangalore
    4-8 years
    Share
    Posted : 19th Feb 2018
  • Roljobs Technology Services Private Limited
    Keyskills: Asic Design, RTL Design, SOC design
    Summary: We are looking for ASIC Design Engineer with 6-12 years of experience with good working experience in RTL Coding.
    Bengaluru / Bangalore
    6-12 years
    Share
    Posted : 19th Feb 2018
  • Cyient Inc
    Keyskills: Physical Design, Floor planning, P&R, extraction, IR Drop Analysis, Timing and Signal Integrity closure
    Summary: Walkin Date: 24.02.2017 (Saturday). Timings :10 AM to 2 PM . Interview Location: Cyient Ltd, Manikonda, Hyderabad.
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-12 years
    Share
    Company Profile
    Posted : 19th Feb 2018
  • Cyient Inc
    Keyskills: BIST, MBIST, Scan insertion, ATPG, Boundary Scan, JTAG, DFT, Memory BIST, WGL, TDL
    Summary: Walkin Date: 24.02.2017 (Saturday). Timings :10 AM to 2 PM . Interview Location: Cyient Ltd, Manikonda, Hyderabad.
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-12 years
    Share
    Company Profile
    Posted : 19th Feb 2018
  • Cyient Inc
    Keyskills: Physical Design, Floor planning, P&R, extraction, IR Drop Analysis, Timing and Signal Integrity closure
    Summary: Exp on top-level floor planning, PG planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (ti..
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-12 years
    Share
    Company Profile
    Posted : 19th Feb 2018
  • Cyient Inc
    Keyskills: BIST, MBIST, Scan insertion, ATPG, Boundary Scan, JTAG, DFT, Memory BIST, WGL, TDL
    Summary: DFT engineer with good analyzing capabilities with the below Skills: Scan insertion & ATPG- Pattern Simulation with and without timing annotation and debugging simulation mismatches (Cadence Inci..
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-12 years
    Share
    Company Profile
    Posted : 19th Feb 2018
  • Cyient Inc
    Keyskills: Physical Design, Floor planning, P&R, extraction, IR Drop Analysis, Timing and Signal Integrity closure
    Summary: Walk-in Date: 24.02.2017 (Saturday). Timings :10 AM to 2 PM . Interview Location: Ahmedabad.
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-12 years
    Share
    Company Profile
    Posted : 19th Feb 2018
  • Cyient Inc
    Keyskills: BIST, MBIST, Scan insertion, ATPG, Boundary Scan, JTAG, DFT, Memory BIST, WGL, TDL
    Summary: Walk-in Date: 24.02.2017 (Saturday). Timings :10 AM to 2 PM . Interview Location: Ahmedabad.
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-12 years
    Share
    Company Profile
    Posted : 19th Feb 2018
  • Cyient Inc
    Keyskills: Physical Design, Floor planning, P&R, extraction, IR Drop Analysis, Timing and Signal Integrity closure
    Summary: Exp on top-level floor planning, PG planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (ti..
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-12 years
    Share
    Company Profile
    Posted : 19th Feb 2018
  • Cyient Inc
    Keyskills: BIST, MBIST, Scan insertion, ATPG, Boundary Scan, JTAG, DFT, Memory BIST, WGL, TDL
    Summary: DFT engineer with good analyzing capabilities with the below Skills: Scan insertion & ATPG- Pattern Simulation with and without timing annotation and debugging simulation mismatches (Cadence Inci..
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-12 years
    Share
    Company Profile
    Posted : 19th Feb 2018
  • Synopsys India Private Limited
    Keyskills: Physical Design, Place & route, STA, Backend design, Floor planning, Timing Closure, Low Power, ICCII, IC Compiler
    Summary: Physical Design of complex blocks and/or FullChip designs. Timing, power and area trade-offs. Pick-up new flows, learn on the job and influence QOR is a must. Experience delivering designs w..
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    4-14 years
    Share
    Posted : 19th Feb 2018
  • Zen3 Infosolutions private limited
    Keyskills: Physical Design, VLSI Engineer, ASIC Verification, RTL, ASIC Design, RTL Design, RTL Coding
    Summary: Physical Design,VLSI Engineer,ASIC Verification
    Bengaluru / Bangalore, Hyderabad / Secunderabad
    3-13 years
    Share
    Posted : 15th Feb 2018
  • Infosight Software And Consulting Services Private Limited
    Keyskills: Chip Level, block level, CMOS, Cadence Virtuoso
    Summary: Hi We have opening for Senior Analog Layout Engineer for Bangalore location.
    Bengaluru / Bangalore
    3-12 years
    Share
    Posted : 13th Feb 2018
  • E Infochips Limited
    Keyskills: HDL, Verilog, VHDL, System Verilog, Test bench Methodologies, UVM
    Summary: Proficient in HDL (Verilog/VHDL/System Verilog), Test bench Methodologies(UVM)
    Ahmedabad, Bengaluru / Bangalore
    2-7 years
    Share
    Posted : 13th Feb 2018
  • Multi Recruit
    Keyskills: UX Design, Visual Design, Photoshop, Sketch, Illustrator, Html, Css, Javascript, E-Commerce, Interaction Design
    Summary: Greetings! We are hiringUX Designerwith 1-3years of experience, interested candidates can share your CV [HIDDEN TEXT]
    Bengaluru / Bangalore
    1-3 years
    Share
    Posted : 8th Feb 2018
  • Opening for UX design

    Walk-in Jobs
    Golden Era Property Private Limited
    Keyskills: Photoshop, Sketch, Illustrator, Wireframe, storyboard,
    Summary: ABOUT THE JOB : We are looking for a UI/UX Designer to turn our software into easy-to-use products for our clients. UI/UX Designer responsibilities include gathering user requirements,..
    Bengaluru / Bangalore
    2-4 years
    Share
    Posted : 7th Feb 2018
  • Multi Recruit
    Keyskills: Analog Layout Designer, Analog Layout Design, Analog Layout Engineer, RF, Custom Layout Design
    Summary: Greetings! We are hiring Analog and Mixed Signal Layout Engineer with 2-5 years of experience, interested candidates can share your CV with [HIDDEN TEXT]
    Bengaluru / Bangalore
    5-10 years
    Share
    Posted : 7th Feb 2018
  • GE India Industrial Private Limited
    Keyskills: Electrical Design, FPGA Design, Matlab, Board Design, Microcontroller, Microprocessor, Board Bring Up
    Summary: Electrical Design Engineer, who will be responsible for design and development of electronic subsystems for use in cathlab systems.
    Bengaluru / Bangalore
    2-6 years
    Share
    Posted : 6th Feb 2018
  • Flexi Careers India Private Limited
    Keyskills: , Hardware Design Engineer , Hardware... Design Technical Leader , Quality
    Bengaluru / Bangalore, Chennai
    4-10 years
    Share
    Posted : 6th Feb 2018
  • Talent Corner Hr Services Private Limited
    Keyskills: System Verilog, VMM, Methodologies, SOC Verification, SOC, SATA, PCIE, Scripting Language, hvls, ovm methodologiesUSB
    Summary: Design and develop test benches using HVLs like System Verilog Deep expertise in Verification Methodologies like UVM, OVM, VMM Knowledge of ARM based SoC verification/Interface protocols like ..
    Bengaluru / Bangalore
    5-15 years
    Share
    Posted : 31st Jan 2018
  • Prodesta Technologies
    Keyskills: SRAM, Memory Design, Analog layout Engineer, SoC DFT Engineer, RTL Verification, Dft Engineer
    Summary: Our Client have an Openings for Memory Design/Memory Layout Engineer/Analog Layout Engineer/SoC DFT Engineer/RTL Verification for Bangalore Location.
    Bengaluru / Bangalore
    2-12 years
    Share
    Posted : 27th Jan 2018
Get jobs in your inbox