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1 - 40 of 83 Job(s)
Arise Solution
Keyskills: perl, verification, shell scripting, development, circuit design, tcl, simulation, si...
Summary: RESPONSIBILITIES , * Drive timing sign-off criteria for designs in latest technology nodes, 28nm and below. , * Lead in the area of signal integrity, margin development. , * You will be Interac..
Bengaluru / Bangalore
3-6 years
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Posted : 12th Apr 2017
Roljobs Technology Services Private Limited
Keyskills: SOC Verification ,Processor Verification ,VMM ,UVM ,System verilog ,AXI ,AHB
Summary: India KA Bengaluru , PAN INDIA , 5 - 8 years , IT-Software/Software Services , India KA Bengaluru , PAN INDIA , 5 - 8 years , IT-Software/Software Services ,,We'd love to hear from you, if : ,,- Y..
Bengaluru / Bangalore
5-8 years
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Posted : 23rd Feb 2017
PEOPLEplus Professional Services Pvt Ltd
Keyskills: ARM Processor,Digital design,Micro architecture,RTL,Linting,CDC,IP design,AXI
Summary: Strong knowledge of ARM processors, micro-controller IP design using ARM processors, AHB, AXI is mandatory10-15yrs exp
Bengaluru / Bangalore
10-16 years
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Posted : 6th Mar 2017
Roljobs Technology Services Private Limited
Keyskills: Processor verification ,SOC Verification ,System verilog ,UVM ,VMM ,AHB ,AXI
Summary: India KA Bengaluru , PAN INDIA , 5 - 8 years , IT-Software/Software Services , India KA Bengaluru , PAN INDIA , 5 - 8 years , IT-Software/Software Services ,,Experience : 5-8 years,,Location : Ban..
Bengaluru / Bangalore
5-8 years
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Posted : 23rd Feb 2017
Apollo Microsystems Pvt Ltd
Keyskills: Verilog,VHDL,Design Engineer, Mission Critical and Safety Critical Applications
Summary: Drive his own way to handles FPGA based designs based on Xilinx Altera FPGA family like kintex-7,zync Simulation & test benches creationCombination of FPGA and DSP is desired.
Hyderabad / Secunderabad
1-3 years
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Posted : 17th Apr 2017
Skoruz Technologies Private Li
Keyskills: "system verilog"
Hyderabad / Secunderabad
3-5 years
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Posted : 19th Apr 2017
Skoruz Technologies Private Li
Keyskills: verilog
Hyderabad / Secunderabad
3-5 years
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Posted : 19th Apr 2017
Manpower Mining India Private Limited
Keyskills: Design, Verification, SV, UVM, OVM, IP, SOC
Summary: Very good System Verilog/UVM/OVM knowledge with prior work experience on live projects.Good Logical Thinking, excel at solving the digital logicMust have hands on experience in complete IP/SoC ver..
Hyderabad / Secunderabad
4-10 years
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Posted : 20th Apr 2017
Koral Human Resource Consultan
Keyskills: RTL,Asic,eda,fpga
Bengaluru / Bangalore, Hyderabad / Secunderabad
8-15 years
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Posted : 19th Apr 2017
ConnectPro Management Consultants Private Limited
Keyskills: testing,protocol,SATA,Flash,ASIC,verilog,compiler,C,Software,C++,IP,FPGA,microcontrol...
Summary: Functional Validation Lead Engineer , We are looking for a candidate with these specific personal characteristic and qualifications , 4+ years of experience in validating IPs/SOC of multimillion ..
Delhi, Noida
4-9 years
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Posted : 23rd Apr 2017
ConnectPro Management Consultants Private Limited
Keyskills: basic,Database,Verilog,Software,IP,ASIC,FPGA,VLSI
Summary: - You will be responsible for IP / sub-system level micro-architecture development and RTL coding. , - Prepare block/sub-system level timing constraints. , - Integrate IP/sub-system. , - Perform ..
Bengaluru / Bangalore
4-8 years
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Posted : 23rd Apr 2017
Softtrends Software Private Li
Keyskills: FPGA,VHDL,Verilog,"Design Engineer"
Bengaluru / Bangalore
7-9 years
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Posted : 21st Apr 2017
Ark Infotech Spectrum India Pr
Keyskills: "Design Verification","verilog","SOC","UVM","OVM","ARM Cortex","AXI","AHB"
Bengaluru / Bangalore
6-9 years
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Posted : 23rd Feb 2017
PEOPLEplus Professional Services Pvt Ltd
Keyskills: IP Design, ARM Processors, AHB, AXI, Microarchitecture, RTL, Synthesis, STS, logic sy...
Summary: Responsible for the design and development of CPU Subsystems and associated component IPs which includes micro architecture development, logic design, LINT, Clock Domain Crossing Analysis, UPF, LE..
Bengaluru / Bangalore
10-18 years
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Posted : 22nd Mar 2017
Arise Solution
Keyskills: Tcl,Verilog,Scripting,ModelSim,Perl,Shell,UNIX,Shell Scripting
Summary: Job Profile: , * Excellent Verilog and Logic Design Concepts. , * Experience in HW Debug & using Logic Analyzers. , * Knowledge of Bus Protocols like AXI / AHB. , * Strong working knowledge of UNI..
Bengaluru / Bangalore
6-8 years
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Posted : 11th Apr 2017
Arise Solution
Keyskills: Perl,ASIC,Shell,IT,Shell Scripting,Tcl,Scripting,Verilog,ModelSim,Software,VLSI,UNIX
Summary: Job Description: , Excellent Verilog and Logic Design Concepts. , * Experience in HW Debug & using Logic Analyzers. , * Knowledge of Bus Protocols like AXI / AHB. , * Strong working knowledge of U..
Bengaluru / Bangalore
6-8 years
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Posted : 11th Apr 2017
Arise Solution
Keyskills: Perl,ASIC,Shell,IT,Shell Scripting,Tcl,Scripting,Verilog,ModelSim,Software,VLSI,UNIX
Summary: Job Description : , * Excellent Verilog and Logic Design Concepts. , * Experience in HW Debug & using Logic Analyzers. , * Knowledge of Bus Protocols like AXI / AHB. , * Strong working knowledge o..
Bengaluru / Bangalore
6-8 years
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Posted : 11th Apr 2017
SPEED Consulting Private Limit
Keyskills: "design verification lead","asic verification lead","design verification","SV OVM","S...
Bengaluru / Bangalore, Hyderabad / Secunderabad
5-13 years
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Posted : 13th Apr 2017
Arise Solution
Keyskills: Perl,ASIC,IT,Verilog,http,Scripting,Software,C,TCL,VLSI
Summary: Company Description Client of FiniteHR, IT Embedded Company , Job Description , Our Client SeviTech is looking for SoC Verification Engineer (C + Verilog) , About our Client: http: / / sevitechsys..
Bengaluru / Bangalore
6-10 years
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Posted : 11th Apr 2017
Arise Solution
Keyskills: Perl,ASIC,IT,http,Scripting,Software,TCL,IP,VLSI
Summary: Company Description , Finite HR Consulting Job Description , Our Client Sevitech is looking for IP Verification Engineer. , About our Client: http: / / sevitechsystems.com/ , Job Designation: IP V..
Bengaluru / Bangalore
4-8 years
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Posted : 12th Apr 2017
Cyient Limited
Keyskills: Soc, PCIe, USB, I2C, SPI, USB ) AND (Design, designing, designer ) AND (Soc, PCIe, US...
Summary: Walk-in interviews for Design Verification Lead at Bangalore on 25th and 26th March 2017 for positions based at Hyderabad / Bangalore.
Bengaluru / Bangalore, Hyderabad / Secunderabad
6-12 years
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Company Profile
Posted : 22nd Mar 2017
E Infochips Limited
Keyskills: Verification,asic,ovm,uvm,vmm,soc,System onChip,Verilog,System Verilog,VHDL,Specman,SV
Summary: He/She will be responsible to execute development and verification activities individually/in team with/without guidance.
Ahmedabad, Bengaluru / Bangalore
3-12 years
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Posted : 29th Mar 2017
Royal Softech India Private Li
Keyskills: SOC,Verification,UVM,System,Verilog
Bengaluru / Bangalore
3-10 years
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Posted : 3rd Apr 2017
ConnectPro Management Consultants Private Limited
Keyskills: basic,Database,Verilog,Software,IP,ASIC,FPGA,VLSI
Summary: - You will be responsible for IP / sub-system level micro-architecture development and RTL coding. , - Prepare block/sub-system level timing constraints. , - Integrate IP/sub-system. , - Perform ..
Bengaluru / Bangalore
4-8 years
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Posted : 8th Mar 2017
ConnectPro Management Consultants Private Limited
Keyskills: testing,protocol,SATA,Flash,ASIC,verilog,compiler,C,Software,C++,IP,FPGA,microcontrol...
Summary: Functional Validation Lead Engineer , We are looking for a candidate with these specific personal characteristic and qualifications , 4+ years of experience in validating IPs/SOC of multimillion ..
Delhi, Noida
4-9 years
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Posted : 8th Mar 2017
Wipro Ltd.
Keyskills: ASIC Design
Bengaluru / Bangalore
10-15 years
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Posted : 30th Mar 2017
Wipro Ltd.
Keyskills: VLSI Digital Design And Verification Architect
Summary: Job Description , Key skills required for the job are: , * ASIC Design (Mandatory) , * Testbench Design , * VLSI HDL Verification , Minimum work experience:>=8 Years , Job Description: , • Fr..
Bengaluru / Bangalore
8-10 years
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Posted : 30th Mar 2017
ConnectPro Management Consultants Private Limited
Keyskills: Ethernet,Perl,Verilog,Scripting,hardware,C,FPGA,VHDL,Networking,Flash,ASIC,Tcl,C++,So...
Summary: Digital IP Design Lead /Staff Design Engineer , Job Location-Noida , Key Responsibilities: , Evaluate and deploy the most efficient designs techniques for delivering increasingly complex IP / SoC..
Noida
5-10 years
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Posted : 8th Mar 2017
Cyient Limited
Keyskills: ASIC,Asic Verification,SOC Verification,Physical Design,Physical Design Engineer,Floo...
Summary: CYIENT is hiring for ASIC Engineers from Physical design, Custom Layout/ Analog layout, Design Verification, DFT Implementation, Static timing analysis domains
Bengaluru / Bangalore, Hyderabad / Secunderabad
6-11 years
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Company Profile
Posted : 21st Mar 2017

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